An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm

2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications

Volumn , Issue , 2012, Pages 192-195

  Shih, Wei Yeh ^a   Huang, Kuan Ju ^a   Chen, Chiu Kuo ^a,c   Fang, Wai Chi ^a   Cauwenberghs, Gert ^b   Jung, Tzyy Ping ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Ministry of Economic Affairs   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

90-NM CMOS; CHIP IMPLEMENTATION; CORE AREA; EEG SIGNALS; ELECTROENCEPHALOGRAM SIGNALS; ICA ALGORITHMS; MEMORY UNITS; OPERATING FREQUENCY; PROPOSED ARCHITECTURES; SUB-GAUSSIANS; SUPPLY VOLTAGES; SYSTEM ARCHITECTURES; TRAINING UNIT;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; ELECTROENCEPHALOGRAPHY; INDEPENDENT COMPONENT ANALYSIS;

SIGNAL PROCESSING;

EID: 84874167804     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BioCAS.2012.6418464     Document Type: Conference Paper

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