A hardware-efficient VLSI implementation of a 4-channel ICA processor for biomedical signal measurement

Digest of Technical Papers - IEEE International Conference on Consumer Electronics

Volumn , Issue , 2011, Pages 607-608

  Chen, Chiu Kuo ^a,b   Chua, Ericson ^a   Fu, Chih Chung ^a   Tseng, Shao Yen ^a   Fang, Wai Chi ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b MINISTRY OF ECONOMIC AFFAIRS   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BIOMEDICAL SIGNAL; CMOS TECHNOLOGY; EEG SIGNALS; EFFICIENT DESIGNS; ONLINE MONITORING; PARALLEL PROCESSING; VLSI IMPLEMENTATION;

CMOS INTEGRATED CIRCUITS; CONSUMER ELECTRONICS; INDEPENDENT COMPONENT ANALYSIS;

PIPELINE PROCESSING SYSTEMS;

EID: 79952955656     PISSN: 0747668X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCE.2011.5722766     Document Type: Conference Paper

References (4)

1. Luke Rankine, Nathan Stevenson, Mostefa Mesbah, and Boualem Boashash," A Nonstationary Model of Newborn EEG", IEEE Trans. Biomed. Eng., VOL. 54, NO. 1, JANUARY 2007.
2. R. Vigario, J. Sarela, V. Jousmaki, M. Hamalainen, and E. Oja, "Independent component approach to the analysis of EEG and MEG recordings," IEEE Trans. Biomed. Eng., vol. 47, no. 5, pp. 589-593, May 2000.
3. Kuo-Kai Shyu and Ming-Huan Li," FPGA Implementation of FastICA based on Floating-Point Arithmetic Design for Real-Time Blind Source Separation," 2006 International Joint Conference on Neural Networks, Vancouver, BC, Canada July 16-21, 2006.
4. Wei-Chung Huang, Shao-Hang Hung, Jen-Feng Chung, Meng-Hsiu Chang, Lan-Da Van, Chin-Teng Lin,"FPGA implementation of 4-channel ICA for on-line EEG signal separation," Biomedical Circuits and Systems Conference, Page(s):65-68,20-22 Nov. 2008.