Compact trie forest: Scalable architecture for IP lookup on FPGAs

2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012

Volumn , Issue , 2012, Pages

  Erdem, Oguzhan ^a   Carus, Aydin ^a   Le, Hoang ^b  

^a TRAKYA UNIVERSITY   (Turkey)

^b University of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPACT DATA STRUCTURE; DESIRABLE FEATURES; FPGA DEVICES; IMPLEMENTATION PLATFORMS; INTERNET PROTOCOL LOOKUPS; IP LOOKUP; LINE CARD; LONGEST PREFIX MATCHING (LPM); LOOKUPS; MEMORY BANKS; MEMORY EFFICIENCY; MEMORY FOOTPRINT; ON CHIP MEMORY; OPTIMIZED ARCHITECTURES; PACKET SIZE; PIPELINED ARCHITECTURE; PROPOSED ARCHITECTURES; RESEARCH COMMUNITIES; ROUTING TABLE; SCALABLE ARCHITECTURES; SEARCH ALGORITHMS; SUBSTANTIAL REDUCTION;

ALGORITHMS; DATA STRUCTURES; FORESTRY; INTERNET PROTOCOLS; MEMORY ARCHITECTURE; PARALLEL ARCHITECTURES; RECONFIGURABLE ARCHITECTURES; ROUTERS; STATIC RANDOM ACCESS STORAGE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

DATA BASES; ELECTRIC CIRCUITS; FORESTS; INTERNET; PROBLEM SOLVING;

EID: 84874166231     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ReConFig.2012.6416734     Document Type: Conference Paper

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