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Volumn 33, Issue 11, 2012, Pages 1574-1576

Fully gravure-printed flexible full adder using SWNT-based TFTs

Author keywords

Carbon nanotube thin film transistor (TFT); flexible electronics; full adder; gravure; printed logic gates; process variation

Indexed keywords

ARITHMETIC LOGIC UNIT; ELECTRICAL CHARACTERISTIC; FLEXIBLE PLASTIC SUBSTRATES; FULL ADDERS; GRAVURE; GRAVURE PRINTING; INPUT SIGNAL; PROCESS VARIATION; PROPAGATION DELAYS; SUPPLY VOLTAGES; THIN-FILM TRANSISTOR (TFTS);

EID: 84867894488     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2012.2214757     Document Type: Article
Times cited : (43)

References (11)
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  • 4
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    • J. Noh, S. Kim, K. Jung, J. Kim, S. Cho, and G. Cho, "Fully gravure printed half adder on plastic foils," IEEE Electron Device Lett., vol. 32, no. 11, pp. 1555-1557, Nov. 2011.
    • (2011) IEEE Electron Device Lett. , vol.32 , Issue.11 , pp. 1555-1557
    • Noh, J.1    Kim, S.2    Jung, K.3    Kim, J.4    Cho, S.5    Cho, G.6
  • 7
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    • Device and circuit simulation of printed polymer electronics
    • Aug.
    • M. Bartzsch, H. Kempa, M. Otto, A. Hubler, and D. Zielke, "Device and circuit simulation of printed polymer electronics," Organ. Electron., vol. 8, no. 4, pp. 431-438, Aug. 2007.
    • (2007) Organ. Electron. , vol.8 , Issue.4 , pp. 431-438
    • Bartzsch, M.1    Kempa, H.2    Otto, M.3    Hubler, A.4    Zielke, D.5
  • 8
    • 78650258159 scopus 로고    scopus 로고
    • Modeling of printed single walled carbon nanotube thin film transistors for attaining optimized clock signals
    • Nov.
    • J. Noh, M. Jung, K. Jung, S. Lim, G. Lee, V. Subramanian, A. D. Deonard, J. Tour, and G. Cho, "Modeling of printed single walled carbon nanotube thin film transistors for attaining optimized clock signals," J. Appl. Phys., vol. 108, no. 10, pp. 102 811-1-102 811-7, Nov. 2010.
    • (2010) J. Appl. Phys. , vol.108 , Issue.10 , pp. 1028111-1028117
    • Noh, J.1    Jung, M.2    Jung, K.3    Lim, S.4    Lee, G.5    Subramanian, V.6    Deonard, A.D.7    Tour, J.8    Cho, G.9
  • 11
    • 11244349809 scopus 로고    scopus 로고
    • Direct gravure printing (DGP) method for printing fine-line electrical circuits on ceramics
    • Apr.
    • M. Kittila, J. Hagberg, E. Jakku, and S. Leppavuori, "Direct gravure printing (DGP) method for printing fine-line electrical circuits on ceramics," IEEE Trans. Electron. Packag. Manuf., vol. 27, no. 2, pp. 109-114, Apr. 2004.
    • (2004) IEEE Trans. Electron. Packag. Manuf. , vol.27 , Issue.2 , pp. 109-114
    • Kittila, M.1    Hagberg, J.2    Jakku, E.3    Leppavuori, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.