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ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn , Issue , 2012, Pages 1553-1556

Loop scheduling optimization for chip-multiprocessors with non-volatile main memory

(5) Wang, Yan b Du, Jiayi b Hu, Jingtong c Zhuge, Qingfeng a Sha, Edwin H M a,c

a CHONGQING UNIVERSITY (China)

b HUNAN UNIVERSITY (China)

c The University of Texas at Dallas (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AVERAGE LIFETIME; CHIP-MULTIPROCESSOR; LOOP SCHEDULING; MAIN MEMORY; MULTIPROCESSOR-SYSTEM; NON-VOLATILE; NON-VOLATILE MEMORIES; SCHEDULE LENGTH; TIME-CONSUMING PARTS;

EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; SIGNAL PROCESSING;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 84867604318 PISSN: 15206149 EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ICASSP.2012.6288188 Document Type: Conference Paper

Times cited : (7)

References (8)

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2
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3
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4
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- Reducing Write Activities on Non-volatile Memories in Embedded CMPs via Data Migration and Recomputation
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- Minimizing Write Activities to Non-volatile Memory via Scheduling and Recomputation
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- Code Size Reduction Technique and Implementation for Software-Pipelined DSP Application
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7
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