Demonstration of a plasmonic MMI switch in 10-Gb/s true data traffic conditions

IEEE Photonics Technology Letters

Volumn 24, Issue 20, 2012, Pages 1819-1822

  Kalavrouziotis, Dimitrios ^a   Papaioannou, Sotirios ^b   Vyrsokinos, Konstantinos ^c   Markey, Laurent ^d   Dereux, Alain ^d   Giannoulis, Giannis ^a   Apostolopoulos, Dimitrios ^a   Avramopoulos, Hercules ^a   Pleros, Nikolaos ^b  

^a NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

^b ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^c INFORMATION TECHNOLOGIES INSTITUTE   (Greece)

^d UNIVERSITÉ DE BOURGOGNE   (France)

Author keywords

Active plasmonics; dielectric loaded surface plasmon polaritons; Mach Zehnder interferometer; silicon on insulator (SOI) photonics; thermo optic switch

Indexed keywords

10 GB/ S; ACTIVE PLASMONICS; DATA SIGNALS; DATA TRAFFIC; EXPERIMENTAL PERFORMANCE EVALUATIONS; EXTINCTION RATIOS; MODULATION DEPTH; MULTI-MODE INTERFERENCE; PLASMONIC; SILICON ON INSULATOR; SILICON-ON-INSULATORS; SURFACE PLASMON POLARITONS; THERMO-OPTIC SWITCH;

ELECTROMAGNETIC WAVE POLARIZATION; MACH-ZEHNDER INTERFEROMETERS;

PLASMONS;

EID: 84866933986     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/LPT.2012.2216518     Document Type: Article

References (12)

1. M. A. Taubenblatt, J. A. Kash, and Y. Taira, "Optical interconnects for high performance computing," in Proc. OFC Conf., Los Angeles, CA, 2011, pp. 1-3.
2. K. Bergman, "Photonic networks for intra-chip, inter-chip, and boxto-box interconnects in high performance computing," in Proc. ECOC Conf., Cannes, France, 2006, pp. 1-3.
3. H. A. Atwater, "The promise of plasmonics," Sci. Amer. Mag., vol. 296, pp. 38-45, Apr. 2007.
4. R. Zia, J. A. Schuller, A. Chandran, and M. L. Brongersma, "Plasmonics: The next chip-scale technology," Mater. Today, vol. 9, nos. 7-8, pp. 20-27, 2006.
5. D. Gramotnev and S. Bozhevolnyi, "Plasmonics beyond the diffraction limit," Nature Photon., vol. 4, pp. 83-91, Jan. 2010.
6. S. Papaioannou, et al., "A 320 Gb/s-throughput capable 2×2 siliconplasmonic router architecture for optical interconnects," J. Lightw. Technol., vol. 29, no. 21, pp. 3185-3195, Nov. 1, 2011.
7. J. Gosciniak, et al., "Thermo-optic control of dielectric-loaded plasmonic waveguide components," Opt. Express, vol. 18, no. 2, pp. 1207-1216, 2010.
8. D. Kalavrouziotis, et al., "0.48 Tb/s (12×40 Gb/s) WDM transmission and high-quality thermo-optic switching in dielectric loaded plasmonics," Opt. Express, vol. 20, no. 7, pp. 7655-7662, 2012.
9. G. Giannoulis, et al., "Data transmission and thermo-optic tuning performance of dielectric-loaded plasmonic structures hetero-integrated on a silicon chip," IEEE Photon. Technol. Lett., vol. 24, no. 5, pp. 374-376, Mar. 1, 2012.
10. D. Kalavrouziotis, et al., "First demonstration of active plasmonic device in true data traffic conditions: ON/OFF thermo-optic modulation using a hybrid silicon-plasmonic asymmetric MZI," in Proc. OFC/NFOEC Conf., Los Angeles, CA, 2012, pp. 1-3, paper OW3E.3.
11. A. Pitilakis and E. E. Kriezis, "Longitudinal 2 × 2 switching configurations based on thermo-optically addressed dielectric-loaded plasmonic waveguides," J. Lightw. Technol., vol. 29, no. 17, pp. 2636-2546, Sep. 1, 2011.
12. K. Hassan, et al, "Thermo-optic plasmo-photonic mode interference switches based on dielectric loaded waveguides," Appl. Phys. Lett., vol. 99, no. 24, pp. 241110-1-241110-3, 2011.