A 0.13μm 8Mb logic based Cu xSi yO resistive memory with self-adaptive yield enhancement and operation power reduction

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2012, Pages 42-43

  Xue, X Y ^a   Jian, W X ^a   Yang, J G ^a   Xiao, F J ^a   Chen, G ^a   Xu, X L ^a   Xie, Y F ^a   Lin, Y Y ^a   Huang, R ^b   Zhou, Q T ^b   Wu, J G ^b  

^a FUDAN UNIVERSITY   (China)

^b SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORPORATION   (China)

Author keywords

on pitch SA; RRAM; SARM; SAWM; yield

Indexed keywords

ON-PITCH SA; RRAM; SARM; SAWM; YIELD;

RANDOM ACCESS STORAGE; SILICON; VLSI CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 84866622938     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2012.6243780     Document Type: Conference Paper

References (5)

1. W. Otsuka et al., ISSCC, pp. 210-212, 2011;
2. S.S. Sheu et al., ISSCC, pp. 200-202, 2011;
3. P. Schrogmeier et al., Symp. on VLSI Circ., pp. 186-187, 2007;
4. M. Yin et al., EDL, pp. 681-683, 2008;
5. M. Wang et al., Symp. on VLSI Tech., pp. 89-90, 2010.