A long-range, fully-integrated, regulator-less CMOS power amplifier for wireless sensor communications

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2012, Pages 145-148

  Wesson, William ^a   Bhagavatula, Venumadhav ^a   Pang, Ka Wo ^a   Shin, Soonkyun ^a   Yang, Pohan ^a   Rudell, Jacques C ^a  

^a University of Washington   (United States)

Author keywords

CMOS PA; Impedance Modulation; Power Control Loop; Regulator less Power Amplifier; Wireless Sensor Networks

Indexed keywords

CMOS PA; CMOS POWER AMPLIFIERS; CONSTANT OUTPUT POWER; HIGH-CURRENT; IMPEDANCE MODULATION; IMPEDANCE SCALING; LOAD IMPEDANCE; OUTPUT POWER; OUTPUT STAGES; POWER COMBINER; POWER CONTROL LOOPS; SENSOR COMMUNICATION; SENSOR DATA COMMUNICATION; SUPER-CAPACITOR; WIRELESS SENSOR COMMUNICATION;

CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ENERGY DISSIPATION; POWER CONTROL; PUBLIC ADDRESS SYSTEMS; SENSORS; VOLTAGE REGULATORS; WIRELESS SENSOR NETWORKS;

POWER AMPLIFIERS;

EID: 84866614291     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2012.6242251     Document Type: Conference Paper

References (7)

1. Bhagavatula V., et.al. "Green Monitoring using a Wide Area Radio Network for Sensor (WARNS) Communication," in Proc. of IGCC, 2011.
2. Grebennikov, A., RF and Microwave Power Amplifier Design. New York: McGraw-Hill Professional Engg, 2005.
3. Walling, J. S., et al., "A Class-E PA with Pulse-Width and Pulse-Position Modulation in 65nm CMOS," IEEE JSSC, Vol. 44, No. 6, pp. 1668-1678, June 2009.
4. Mazzanti, A. et.al., "Analysis of Reliability and Power Efficiency in Cascode Class-E PAs," IEEE JSSC, Vol. 41, No. 5, pp. 1222-1229, May 2006.
5. Kidwai, A. A., et al., "A Fully Integrated Ulta-Low Insertion Loss T/R Switch for 802.11b/g/n Application in 90nm CMOS Process," IEEE JSSC, Vol.42, No.5, Pp. 1352-1360, May 2009.
6. H.M.Nemati et.al. "Design of Varactor-Based Tunable Matching Networks for Dynamic Load Modulation of High Power Amplifiers", in IEEE MTT, Vol.57, No.5, May 2009
7. N.Singhal et.al. "A 19dBm 0.13um CMOS Parallel Class-E Switching PA with Minimal Efficiency Degradation under 6dB Back-off" in IEEE RFIC Symposium Dig. of Papers, Pg.553-556, June 2011.