Compact chopper-stabilized neural amplifier with low-distortion high-pass filter in 0.13μm CMOS

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 1075-1078

  Abdelhalim, Karim ^a   Genov, Roman ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITIVE FEEDBACK; CMOS TECHNOLOGY; DIFFERENTIAL PAIRS; FEEDBACK CIRCUITS; FLICKER NOISE; HIGH-PASS; LOW FREQUENCY; LOW-DISTORTION; MOS CIRCUITS; NEURAL RECORDINGS; OUTPUT SWING; SUBTHRESHOLD;

CMOS INTEGRATED CIRCUITS; HIGH PASS FILTERS; SPURIOUS SIGNAL NOISE;

LOW PASS FILTERS;

EID: 84866603398     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271415     Document Type: Conference Paper

References (9)

1. N Verma and A P Chandrakasan,"A 25 μw 100ks/s 12b ADC for wireless micro-sensor applications," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 222-224, February 2006.
2. T. Denison, K. Consoer, W. Santa, A. Avestruz, J. Cooley, and A. Kelly,"A 2 uw 100 nv/rthz chopper-stabilized instrumentation amplifier for chronic measurement of neural field potentials," IEEE Journal of Solid-State Circuits, vol. 42, no. 12, pp. 2934-2945, December 2007.
3. R. F. Yazicioglu, P. Merken, R. Puers, and C. Van Hoof,"A 200 uw eight-channel eeg acquisition asic for ambulatory eeg systems," IEEE Journal of Solid-State Circuits, vol. 3025-3038, no. 12, pp. 2934-2945, December 2008.
4. S. Lee, H. Lee, M. Kiani, U. Jow, and M. Ghovanloo,"An inductively powered scalable 32-channel wireless neural recording system-on-a-chip for neuroscience applications," IEEE International Solid-State Circuits Conference, pp. 120-121, Feb. 2010.
5. R R. Harrison, P T. Watkins, R J. Kier, R O. Lovejoy, D J. Black, Bradley Greger, and Florian Solzbacher,"A low-power integrated circuit for a wireless 100-electrode neural recording system," IEEE Journal of Solid-State Circuits, vol. 42, no. 1, pp. 123-133, January 2007.
6. J. N. Y. Aziz, K. Abdelhalim, R. Shulyzki, B. L. Bardakjian, M. Derchansky, D. Serletis, P. L. Carlen, and R. Genov,"256-channel neural recording and delta compression microsystem with 3D electrodes," IEEE Journal of Solid-State Circuits, vol. 44, pp. 995-1005, March 2009.
7. M.Chae, Wentai Liu, Zhi Yang, Tungchien Chen, Jungsuk Kim, Mohanasankar Sivaprakasam, and Mehmet Yuce,"A 128-channel 6mw wireless neural recording ic with on-the-fly spike sorting and uwb tansmitter," IEEE International Solid-State Circuits Conference Digest of Technical Papers, p. 54, February 2008.
8. R.M. Walker, H. Gao, P. Nuyujukian, K. Makinwa, K.V. Shenoy, T. Meng, and B. Murman,"A 96-channel full data rate direct neural interface in 0.13um CMOS," Symposium on VLSI circuits, pp. 144-145, June 2011.
9. R. Muller, S. Gambini, and J.M. Rabaey,"A 0.013mm2 5uw dc-coupled neural signal acquisition IC with 0.5v supply," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 302-304, February 2011.