A 96-channel full data rate direct neural interface in 0.13μm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2011, Pages 144-145

  Walker, Ross M ^a   Gao, Hua ^a   Nuyujukian, Paul ^a   Makinwa, Kofi ^b   Shenoy, K V ^a   Meng, Teresa ^a   Murmann, Boris ^a  

^a STANFORD UNIVERSITY   (United States)

^b DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

AREA EFFICIENT; FULL DATA RATE; NEURAL INTERFACES; NOISE CONDITIONS; OPEN LOOPS; RECORDING SYSTEMS; SENSOR INTERFACE; SWITCHED CAPACITOR;

ANALOG TO DIGITAL CONVERSION; MICROELECTRODES;

VLSI CIRCUITS;

EID: 80052684906     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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