POTRA: A framework for building power models for next generation multicore architectures

Performance Evaluation Review

Volumn 40, Issue 1 SPEC. ISS., 2012, Pages 427-428

  Bertran, Ramon ^a   Gonzàlez, Marc ^b   Martorell, Xavier ^a   Navarro, Nacho ^a   Ayguadé, Eduard ^a  

^a BARCELONA SUPERCOMPUTING CENTER   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

DVFs; performance counters; power estimation

Indexed keywords

EID: 84864714114     PISSN: 01635999     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2254756.2254827     Document Type: Conference Paper

References (5)

1. POTRA Tutorial. http://rbertran.site.ac.upc.edu/potra.
2. F. Bellosa. The benefits of event: driven energy accounting in power-sensitive systems. In EW 9'00, Kolding, Denmark, 2000.
3. C. Isci et al. Runtime power monitoring in high-end processors: Methodology and empirical data. In MICRO'03, page 93, San Diego, CA, USA, 2003.
4. R. Bertran et al. Decomposable and responsive power models for multicore processors using performance counters. In ICS'10, pages 147-158, Tsukuba, Ibaraki, Japan, June 2010. ACM.
5. R. Bertran et al. Energy accounting for shared virtualized environments under dvfs using pmc-based power models. Future Generation Computer Systems, 28(2):457-468, 2012.