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Volumn 1785 LNCS, Issue , 2000, Pages 157-171

Efficient data structure for fully symbolic verification of real-time software systems

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; COMPUTER SOFTWARE; DATA STRUCTURES; ENCODING (SYMBOLS); MODEL CHECKING; SIGNAL ENCODING; VERIFICATION;

EID: 84863938213     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46419-0_12     Document Type: Conference Paper
Times cited : (32)

References (15)
  • 1
    • 35048871678 scopus 로고
    • Data-structures for the verification of timed automata
    • LNCS
    • Asaraain, Bozga, Kerbrat, Maler, Pnueli, Rasse. Data-Structures for the Verification of Timed Automata. Proceedings, HART'97, LNCS 1201.
    • (1201) Proceedings, HART'97
    • Asaraain, B.1    Kerbrat, M.2    Pnueli, R.3
  • 7
    • 0005277420 scopus 로고
    • Efficient timed reachability analysis using clock difference diagrams
    • July, Trento, Italy, LNCS Springer-Verlag
    • G. Behrmann, K.G. Larsen, J. Pearson, C. Weise, Wang Yi Efficient Timed Reachability Analysis Using Clock Difference Diagrams. CAV'99, July, Trento, Italy, LNCS 1633, Springer-Verlag.
    • (1633) CAV'99
    • Behrmann, G.1    Larsen, K.G.2    Pearson, J.3    Weise, C.4    Yi, W.5
  • 8
    • 0022769976 scopus 로고
    • Graph-based algorithms for boolean function manipulation
    • R.E. Bryant. Graph-based Algorithms for Boolean Function Manipulation, IEEE Trans. Comput., C-35(8), 1986.
    • (1986) IEEE Trans. Comput. , vol.C-35 , Issue.8
    • Bryant, R.E.1
  • 9
    • 0002367651 scopus 로고
    • Design and synthesis of synchronization skeletons using branching-time temporal logic
    • Lecture Notes in Computer Science Springer-Verlag
    • E. Clarke and E.A. Emerson. Design and Synthesis of Synchronization Skeletons using Branching-Time Temporal Logic, Proceedings of Workshop on Logic of Programs, Lecture Notes in Computer Science 131, Springer-Verlag, 1981.
    • (1981) Proceedings of Workshop on Logic of Programs , vol.131
    • Clarke, E.1    Emerson, E.A.2
  • 10
    • 84944099472 scopus 로고    scopus 로고
    • Timing assumptions and verification of finite-state concurrent systems
    • LNCS Springer-Verlag
    • D.L. Dill. Timing Assumptions and Verification of Finite-state Concurrent Systems. CAV'89, LNCS 407, Springer-Verlag.
    • CAV'89 , vol.407
    • Dill, D.L.1
  • 12
    • 0003616127 scopus 로고    scopus 로고
    • User-friendly verification
    • October Beijing. Formal Methods for Protocol Engineering and Distributed Systems, editors: J. Wu, S.T. Chanson, Q. Gao; Kluwer Academic Publishers
    • P.-A. Hsiung, F. Wang. User-Friendly Verification. Proceedings of 1999 FORTE/PSTV, October, 1999, Beijing. Formal Methods for Protocol Engineering and Distributed Systems, editors: J. Wu, S.T. Chanson, Q. Gao; Kluwer Academic Publishers.
    • (1999) Proceedings of 1999 FORTE/PSTV
    • Hsiung, P.-A.1    Wang, F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.