Register pressure responsive software pipelining

Proceedings of the ACM Symposium on Applied Computing

Volumn , Issue , 2001, Pages 626-631

  Altemose, Glenn ^a   Norris, Cindy ^a  

^a APPALACHIAN STATE UNIVERSITY   (United States)

Author keywords

Register allocation; Software pipelining

Indexed keywords

COMPUTATION THEORY;

COMPILER TRANSFORMATIONS; INSTRUCTION LEVEL PARALLELISM; REGISTER ALLOCATION; REGISTER PRESSURE; SCHEDULING METHODS; SOFTWARE PIPELINING; STANDARD SOFTWARE;

EMBEDDED SYSTEMS;

EID: 84863930917     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/372202.372787     Document Type: Conference Paper

References (18)

1. A. Aiken and A. Nicolau. Optimal loop parallelization. Technical Report TR88-905, Cornell University, Computer Science Department, Mar. 1988.
2. V. H. Allan, R. B. Jones, R. M. Lee, and S. J. Allan. Software pipelining. ACM Computing Surveys, 27(3):367-432, Sept. 1995.
3. G. J. Chaitin. Register allocation and spilling via graph coloring. In Proceedings of the SIGPLAN '82 Symposium on Compiler Construction, pages 98-105, June 1982.
4. A. E. Eichenberger and E. S. Davidson. Stage scheduling: A technique to reduce the register requirements of a modulo schedule. In Proceedings of the 28th Annual International Symposium on Microarchitecture, pages 338-349, Nov. 1995.
5. A. E. Eichenberger, E. S. Davidson, and S. G. Abraham. Optimum modulo schedules for minimum register requirements. In International Conference on Super-computing, pages 31-40, July 1995.
6. G. R. Gao. A timed petri-net model for fine-grain loop scheduling. In Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, pages 204-218, June 1991.
7. R. Govindarajan, E. R. Altman, and G. R. Gao. Minimal register requirements under resource-constrained software pipelining. In Proceedings of the 27th Annual International Symposium on Microarchitecture, pages 85-94, San Jose, California, Nov. 30-Dec. 2, 1994. ACM SIGMICRO and IEEE Computer Society TO-MICRO.
8. R. A. Huff. Lifetime-sensitive modulo scheduling. ACM SIGPLAN Notices, 28(6):258-267, June 1993.
9. J. Llosa, M. Valero, and E. Ayguade. Heuristics for register-constrained software pipelining. In Proceedings of the 29th Annual International Symposium on Microarchitecture, pages 250-261, Dec. 1996.
10. J. Llosa, M. Valero, E. Ayguade, and A. Gonzalez. Heuristics for register-constrained software pipelining. In Proceedings of the 28th Annual International Symposium on Microarchitecture, pages 250-261, Nov. 1995.
11. Q. Ning and G. R. Gao. A novel framework of register allocation for software pipelining. In Papers of the 20th ACM Symposium on Principles of Programming Languages, pages 29-42, Jan. 1993.
12. B. R. Rau. Iterative modulo scheduling: An algorithm for software pipelining loops. In Proceedings of the 27th Annual International Symposium on Microarchitecture, pages 63-74, Nov. 1994.
13. B. R. Rau, M. Lee, P. P. Tirumalai, and M. S. Schlansker. Register allocation for software pipelined loops. In SIGPLAN '92 Conference on Programming Language Design and Implementation, pages 283-299, 1992.
14. B. R. Rau, M. S. Schlansker, and P. P. Tirumalai. Code generation schema for modulo scheduled loops. In Proceedings of the 25th Annual International Symposium on Microarchitecture, pages 158-169, Dec. 1992.
15. M. S. Schlansker and B. R. Rau. EPIC: Explicitly parallel instruction computing. In IEEE Computer, pages 37-45, Feb. 2000.
16. Trimaran Organization. Trimaran, an Infrastructure for Research in Instruction-Level Parallelism, 1999. http://www.trimaran.org.
17. J. Wang, A. Krall, and M. A. Erti. Register requirement for exploiting loops' maximum instruction-level parallelism. In The Fourth International Conference for Young Computer Scientists, pages 70-75, Beijing, 1995. Peking University Press.
18. J. Wang, A. Krall, M. A. Erti, and C. Eisenbeis. Software pipelining with register allocation and spilling. In Proceedings of the 27th Annual International Symposium on Microarchitecture, pages 95-99, Nov. 1994.