Heuristics for register-constrained software pipelining

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1996, Pages 250-261

  Llosa, Josep ^a   Valero, Mateo ^a   Ayguade, Eduard ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; DATA STORAGE EQUIPMENT; HEURISTIC PROGRAMMING; ITERATIVE METHODS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS;

INITIATION INTERVAL; LOOP SCHEDULING TECHNIQUE; SOFTWARE PIPELINING; THROUGHPUT OPTIMAL SCHEDULES;

MICROPROGRAMMING;

EID: 0030395190     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (31)