-
1
-
-
77955253149
-
Memory models: A case for rethinking parallel languages and hardware
-
August
-
S. V. Adve and H.-J. Boehm. Memory models: A case for rethinking parallel languages and hardware. Communications of the ACM, 53(8):90-101, August 2010.
-
(2010)
Communications of the ACM
, vol.53
, Issue.8
, pp. 90-101
-
-
Adve, S.V.1
Boehm, H.-J.2
-
2
-
-
84857804113
-
Clarifying and compiling C/C++ concurrency: From C++11 to POWER
-
M. Batty, K. Memarian, S. Owens, S. Sarkar, and P. Sewell. Clarifying and compiling C/C++ concurrency: From C++11 to POWER. In POPL'12, 2012.
-
(2012)
POPL'12
-
-
Batty, M.1
Memarian, K.2
Owens, S.3
Sarkar, S.4
Sewell, P.5
-
3
-
-
79251564123
-
Mathematizing C++ concurrency
-
M. Batty, S. Owens, S. Sarkar, P. Sewell, and T. Weber. Mathematizing C++ concurrency. In POPL'11, pages 55-66, 2011.
-
(2011)
POPL'11
, pp. 55-66
-
-
Batty, M.1
Owens, S.2
Sarkar, S.3
Sewell, P.4
Weber, T.5
-
6
-
-
84863488777
-
How to miscompile programs with "benign" data races
-
H.-J. Boehm. How to miscompile programs with "benign" data races. In HotPar, 2011.
-
(2011)
HotPar
-
-
Boehm, H.-J.1
-
7
-
-
79959966665
-
Performance implications of fence-based memory models
-
H.-J. Boehm. Performance implications of fence-based memory models. In MSPC, 2011.
-
(2011)
MSPC
-
-
Boehm, H.-J.1
-
11
-
-
0005924935
-
-
ISO JTC1/SC22/WG21. ISO/IEC 14882:2011
-
ISO JTC1/SC22/WG21. ISO/IEC 14882:2011, information technology - programming languages - C++. http://www.iso.org/iso/iso-catalogue/catalogue-tc/ catalogue-detail.htm?csnumber=50372oracloseapproximationathttp://www.open-std. org/jtc1/sc22/wg21/docs/papers/2012/n3376.pdf.
-
Information Technology - Programming Languages - C+
-
-
-
13
-
-
0018518477
-
How to make a multiprocessor computer that correctly executes multiprocess programs
-
L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Transactions on Computers, C-28(9):690-691, 1979. (Pubitemid 10420526)
-
(1979)
IEEE Transactions on Computers
, vol.C-28
, Issue.9
, pp. 690-691
-
-
Lamport, L.1
-
14
-
-
84863488778
-
-
retrieved Mar. 8, 2012
-
D. Lea. jsr166e: Class SequenceLock. http://gee.cs.oswego.edu/dl/jsr166/ dist/jsr166edocs/jsr166e/SequenceLock.html retrieved Mar. 8, 2012.
-
Jsr166e: Class SequenceLock
-
-
Lea, D.1
-
15
-
-
79959890823
-
A case for an sc-preserving compiler
-
D. Marino, A. Singh, T. Millstein, M. Musuvathi, and S. Narayanasami. A case for an sc-preserving compiler. In PLDI, 2011.
-
(2011)
PLDI
-
-
Marino, D.1
Singh, A.2
Millstein, T.3
Musuvathi, M.4
Narayanasami, S.5
-
17
-
-
77954721391
-
Lock elision for read-only critical sections in java
-
T. Nkaike and M. Michael. Lock elision for read-only critical sections in java. In PLDI, 2010.
-
(2010)
PLDI
-
-
Nkaike, T.1
Michael, M.2
-
19
-
-
49049109657
-
On validity of program transformations in the java memory model
-
J. Sevcik and D. Aspinall. On validity of program transformations in the java memory model. In ECOOP 2008, pages 27-51, 2008.
-
(2008)
ECOOP 2008
, pp. 27-51
-
-
Sevcik, J.1
Aspinall, D.2
-
21
-
-
77953950611
-
X86-tso: A rigorous and usable programmer's model for x86 multiprocesors
-
July
-
P. Sewell, S. Sarkar, S. Owens, F. Z. Nardelli, and M. O. Myreen. x86-tso: A rigorous and usable programmer's model for x86 multiprocesors. Communications of the ACM, 53(7):89-97, July 2010.
-
(2010)
Communications of the ACM
, vol.53
, Issue.7
, pp. 89-97
-
-
Sewell, P.1
Sarkar, S.2
Owens, S.3
Nardelli, F.Z.4
Myreen, M.O.5
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