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Volumn 41 1, Issue , 2010, Pages 1363-1366

P-40: Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL STORAGE; PIXELS; POLYSILICON; TEMPERATURE; THIN FILM TRANSISTORS; TIMING CIRCUITS;

EID: 84863314406     PISSN: 0097966X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1889/1.3499953     Document Type: Conference Paper
Times cited : (4)

References (10)
  • 1
    • 0043170824 scopus 로고    scopus 로고
    • Low-power driving methods for TFT-LCDs
    • Jun
    • O.-K. Kwon, "Low-power driving methods for TFT-LCDs," SPIE, vol. 5003, pp. 106-120, Jun. 2003.
    • (2003) SPIE , vol.5003 , pp. 106-120
    • Kwon, O.-K.1
  • 2
    • 32144431653 scopus 로고    scopus 로고
    • Dynamic self-refreshing memory in pixel circuit for low power standby mode in mobile LTPS TFT-LCD
    • K. Yamashita, K. Hashimoto, A. Iwatsu, and M. Yoshiga, "Dynamic self-refreshing memory in pixel circuit for low power standby mode in mobile LTPS TFT-LCD," SID Dig. Tech., 2004, pp. 1096-1099.
    • (2004) SID Dig. Tech , pp. 1096-1099
    • Yamashita, K.1    Hashimoto, K.2    Iwatsu, A.3    Yoshiga, M.4
  • 3
    • 0002093702 scopus 로고    scopus 로고
    • Low power consumption TFT-LCD with dynamic memory embedded in pixels
    • H. Tokioka, M. Agari, M. Inoue, and T. Yamamoto, "Low power consumption TFT-LCD with dynamic memory embedded in pixels," SID Dig. Tech., 2001, pp. 280-283.
    • (2001) SID Dig. Tech , pp. 280-283
    • Tokioka, H.1    Agari, M.2    Inoue, M.3    Yamamoto, T.4
  • 6
    • 34249777792 scopus 로고    scopus 로고
    • Embedded TFT nand-type nonvolatile memory in panel
    • Jun
    • H.-T. Chen, S.-I. Hsieh, C.-J. Lin, and Y.-C. King, "Embedded TFT nand-type nonvolatile memory in panel," IEEE Electron Device Lett., vol. 28, no. 6, pp. 499-501, Jun. 2007.
    • (2007) IEEE Electron Device Lett. , vol.28 , Issue.6 , pp. 499-501
    • Chen, H.-T.1    Hsieh, S.-I.2    Lin, C.-J.3    King, Y.-C.4
  • 8
    • 0029183679 scopus 로고
    • An excellent weight-updating-linearity EEPROM synapse memory cell for self-learning neuron-MOS neural networks
    • Jan
    • H. Kosaka, T. Shibata, H. Ishii, and T. Tadahiro, "An excellent weight-updating-linearity EEPROM synapse memory cell for self-learning neuron-MOS neural networks," IEEE Trans. Electron Devices, vol. 42, no. 1, pp. 135-142, Jan. 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , Issue.1 , pp. 135-142
    • Kosaka, H.1    Shibata, T.2    Ishii, H.3    Tadahiro, T.4
  • 10
    • 34247850753 scopus 로고    scopus 로고
    • Parallel addressing scheme for voltage-programmed active-Matrix OLED displays
    • May
    • G. R. Chaji and A. Nathan, "Parallel addressing scheme for voltage-programmed active-Matrix OLED displays," IEEE Trans. Electron Devices, vol. 54, no. 5, pp. 1095-1100, May 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.5 , pp. 1095-1100
    • Chaji, G.R.1    Nathan, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.