Optimizing regular expression matching with SR-NFA on multi-core systems

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2011, Pages 424-433

  Yang, Yi Hua E ^a   Prasanna, Viktor K ^a  

^a University of Southern California   (United States)

Author keywords

Bit level parallelism; Multi core processor; NFA; Regular expression; Thread level parallelism

Indexed keywords

BIT-LEVEL PARALLELISM; MULTI-CORE PROCESSOR; NFA; REGULAR EXPRESSIONS; THREAD LEVEL PARALLELISM;

COMPUTER ARCHITECTURE; FINITE AUTOMATA; MICROPROCESSOR CHIPS; OPTIMIZATION; PARALLEL ARCHITECTURES; PARALLEL PROCESSING SYSTEMS;

PIPELINE PROCESSING SYSTEMS;

EID: 84863042201     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2011.73     Document Type: Conference Paper

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