Lag free transfer transistor in CMOS image sensor pixel with a non-uniform doped gate

2011 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2011

Volumn , Issue , 2011, Pages

  Gao, Zhiyuan ^a   Yao, Suying ^a   Xu, Jiangtao ^a   Li, Binqiao ^a   Gao, Cen ^a  

^a TIANJIN UNIVERSITY   (China)

Author keywords

charge transfer; CMOS Image sensor; Image lag; non uniform doped gate; transfer gate

Indexed keywords

BURIED LAYER; CMOS IMAGE SENSOR; IMAGE LAG; IN-CHANNELS; LIGHT PULSE; NON-UNIFORM DOPED GATE; P-TYPE; POLYSILICON GATES; POTENTIAL PROFILES; SIGNAL VOLTAGE; TRANSFER GATE; TRANSISTOR STRUCTURE;

CHARGE TRANSFER; CMOS INTEGRATED CIRCUITS; DIGITAL CAMERAS; DROPS; IMAGE SENSORS; POLYSILICON; SENSORS; SOLID STATE DEVICES;

PIXELS;

EID: 84862935170     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EDSSC.2011.6117730     Document Type: Conference Paper

References (4)

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2. Jun Ohta, Smart CMOS Image Sensors and Applications, Boca Raton, FL, America, CRC press, 2007.
3. Y. Endo, Y. Nitta, H. Kubo, T. Murao, K. Shimomura, M. Kimura, K. Watanabe, and S. Komori, "4-micron pixel CMOS iamge sensor with low image lag and high-temperature operability," in Proc. SPIE, January 2003, volume 5017, pp. 196-204.
4. I. Inoue, N. Tanaka, H. Yamashita, T. Yamaguchi, H. Ishiwata, and H. Ihara, "Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager," IEEE Trans. Electron Devices, vol. 50, pp. 43-47, January 2003.