Low-power circuit techniques for epileptic seizures detection and subsequent neurostimulation

Journal of Low Power Electronics

Volumn 8, Issue 2, 2012, Pages 133-145

  Salam, Muhammad T ^a   Mounaïm, Fayçal ^a   Nguyen, Dang K ^b   Sawan, Mohamad ^a  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b UNIVERSITÉ DE MONTRÉAL   (Canada)

Author keywords

CMOS; Electrical stimulator; FPGA; Implantable device; Low power; Seizure detector

Indexed keywords

CMOS INTEGRATED CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMPLANTS (SURGICAL); MATLAB; NEURODEGENERATIVE DISEASES; NEUROPHYSIOLOGY; PRINTED CIRCUIT BOARDS; REFRACTORY MATERIALS; TIMING CIRCUITS;

DETECTION SENSITIVITY; ELECTRICAL STIMULATIONS; ELECTRICAL STIMULATORS; IMPLANTABLE DEVICES; LOW POWER; LOW-POWER DISSIPATION; PRINTED CIRCUIT BOARDS (PCB); SEIZURE DETECTORS;

LOW POWER ELECTRONICS;

EID: 84861493443     PISSN: 15461998     EISSN: 15462005     Source Type: Journal    
DOI: 10.1166/jolpe.2012.1179     Document Type: Article

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