Abstracting functionality for modular performance analysis of hard real-time systems

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2, Issue , 2005, Pages 697-702

  Wandeler, Ernesto ^a   Thiele, Lothar ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACT MODELS; ANALYTICAL METHOD; DESIGN DECISIONS; DESIGN PROCESS; DOWNSAMPLING; EARLY DESIGN STAGES; ESSENTIAL CHARACTERISTIC; EVENT STREAMS; FUNCTIONAL PROPERTIES; HARD REAL-TIME SYSTEMS; LEAST RECENTLY USED; PERFORMANCE ANALYSIS; RESOURCE DEMANDS; SYSTEM COMPONENTS; SYSTEM LEVEL PERFORMANCE ANALYSIS;

COMPUTER AIDED DESIGN; REAL TIME SYSTEMS; SYSTEMS ANALYSIS;

EMBEDDED SYSTEMS;

EID: 84861421679     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

1. R. Alurand D. L. Dill. A theory of timed automata. Theoretical Computer Science, 126(2):183-235, 1994.
2. S. Chakraborty, S. Kiinzli, and L. Thiele. A general framework for analysing system properties in platform-based embedded system designs. In Proc. 6th Design, Automation and Test in Europe (DATE), pages 190-195, March 2003.
3. G. Cohen, D. Dubois, J. R Quadrat, and M. Voit. A linear-system-theoretic view of discrete-event processes and its use for performance avaluation in manufacturing. IEEE Transactions on Automatic Control, AC-30(3), 1985.
4. R. Cruz. A calculus for network delay. IEEE Trans, information Theory, 37(1):114-141, 1991.
5. C. Ericsson, A. Wall, and W. Yi. Timed automata as task models for event-driven systems. In In proc. of RTCSA '99. IEEE Press 1999.
6. [61 C. J. Hughes, P. Raul, S. V. Adve, R. Jain, C. Park, and J. Srinivasan. Variability in the execution of multimedia applications and implications for architecture. In Proceedings of the 28th International Symposium on Computer Architecture, pages 254-265, June 2001.
7. M. Jersak, R. Henia, and R. Ernst. Context-aware performance analysis for efficient embedded systems design. In Proc. 7th Design, Automation and Test in Europe (DATE), 2004.
8. R. M. Karp. A characterization of the minimum cycle mean in a digraph. Discrete Mathematics, (23):309-311, 1978.
9. J. Le Boudec and P. Thiran. Network Calculus - A Theory of Deterministic Queuing Systems for the Internet. LNCS 2050, Springer Verlag, 2001.
10. C. Lee, M. Potkonjak, and W. H. Mangione-Smith. Mediabench; A tool for evaluating and synthesizing multimedia and communicatons systems. In International Symposium on Microarchitecture, pages 330-335, 1997.
11. C. Liu and J. Lay land. Scheduling algorithms for multiprogramming in hard real-time environment. Journal of the ACM, 20(1):46-61, 1973.
12. A. Maxiaguine, S. Kiinzli, and L. Thiele. Workload characterization model for tasks with variable execution demand. In Proc. 7th Design, Automation and Test in Europe (DATE), 2004.
13. K. Richter, M. Jersak, and R. Emst. A formal approach to mpsoc performance verification. IEEE Computer, 36(4):60-67, April 2003.
14. L. Thiele, S. Chakraborty, and M. Naedele. Real-time calculus for scheduling hard real-time systems. In Proc. IEEE International Symposium on Circuits and Systems (ISCAS), volume 4, pages 101-104, 2000.
15. E. Wandeler, A. Maxiaguine, and L. Thiele. Quantitative characterization of event streams in analysis of hard real-time applications. In 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2004.