An investigation into damage-free thin die pick and place for 3D stacking

2011 IEEE 13th Electronics Packaging Technology Conference, EPTC 2011

Volumn , Issue , 2011, Pages 819-823

  Malachowski, K ^a   Gonzales, D ^a   Miller, R A ^a   Schnegg, F ^b   Arzberger, A ^b   Hajdarevic, Z ^b   LaManna, A ^a  

^a IMEC   (Belgium)

^b Datacon Technology GmbH   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; 3D STACKING; DAMAGE-FREE; DICING TAPES; DIE PLACEMENT; DIE SIZE; HIGH THROUGHPUT; PHYSICAL DAMAGES; PICK AND PLACE; PROCESS PARAMETERS; RELEASE MECHANISM; SYSTEM CONCEPTS; TARGET POSITION; THERMAL DRIVEN; ULTRA THIN DIES; UV- AND;

ELECTRONICS PACKAGING; TAPES; THREE DIMENSIONAL;

DIES;

EID: 84860907980     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2011.6184526     Document Type: Conference Paper

References (1)

1. "Handling of Thin Dies with Emphasis on Chip-to-Wafer Bonding", Fabian Schnegg et al., pages 167 to 183 in ' Ultra-thin Chip Technology and Apllication', Joachin N. Burghartz (Ed.), Springer New York 2011, ISBN 978-1-4419-7275-0.