A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 55, Issue , 2012, Pages 218-219

  Okada, Kenichi ^a   Kondou, Keitarou ^b   Miyahara, Masaya ^a   Shinagawa, Masashi ^b   Asada, Hiroki ^a   Minami, Ryo ^a   Yamaguchi, Tatsuya ^a   Musa, Ahmed ^a   Tsukui, Yuuki ^a   Asakura, Yasuo ^b   Tamonoki, Shinya ^b   Yamagishi, Hiroyuki ^b   Hino, Yasufumi ^b   Sato, Takahiro ^a   Sakaguchi, Hironori ^a   Shimasaki, Naoki ^a   Ito, Toshihiko ^a   Takeuchi, Yasuaki ^a   Li, Ning ^a   Bu, Qinghong ^a   Murakami, Rui ^a   Bunsen, Keigo ^a   Matsushita, Kota ^a   Noda, Makoto ^b   Matsuzawa, Akira ^a   more..

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BASE BANDS; BASEBAND TRANSCEIVER; DIGITAL BASEBAND; DIGITAL CIRCUITRY; DIRECT CONVERSION; DIRECT-CONVERSION TRANSCEIVERS; ENTIRE SYSTEM; LOW POWER; ORGANIC PACKAGES; WIRELESS COMMUNICATIONS;

QUADRATURE AMPLITUDE MODULATION; WIRELESS TELECOMMUNICATION SYSTEMS;

ANALOG CIRCUITS;

EID: 84860676041     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2012.6176982     Document Type: Conference Paper

References (5)

1. K. Okada, et al., "A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE802.15.3c," ISSCC Dig. Tech. Papers, pp. 160-161, Feb. 2011.
2. S. Emami, et al., "A 60GHz CMOS phased-array transceiver pair for multi-Gb/s wireless communications," ISSCC Dig. Tech. Papers, pp. 164-165, Feb. 2011.
3. H. Asada, et al., "A 60GHz 16Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65nm CMOS,"Asian Solid-State Circuits Conf., pp. 373-376, 2011.
4. R. Suga, et al., "Millimeter-wave antenna with high-isolation using slab waveguide for WPAN applications," European Microwave Conf., pp. 543-546, 2011.
5. J. L. Coz, et al., "Comparison of 65nm LP Bulk and LP PD-SOI with Adaptive Power Gate Body Bias for an LDPC Codec," ISSCC Dig. Tech. Papers, pp. 336-337, Feb. 2011.