Radiation characterization of a dual core LEON3-FT processor

Proceedings of the European Conference on Radiation and its Effects on Components and Systems, RADECS

Volumn , Issue , 2011, Pages 938-944

  Sturesson, F ^a   Gaisler, J ^a   Ginosar, R ^b   Liran, T ^b  

^a Gaisler Research   (United Kingdom)

^b Ramon Chips Ltd   (Israel)

Author keywords

Error correction; Processor; Single Event Upsets; Total Ionizing Dose

Indexed keywords

CMOS PROCESSS; DUAL CORE; FAULT-TOLERANT; PROCESSOR; RADIATION TESTS; SHALLOW TRENCH ISOLATION; SINGLE EVENT LATCH-UP; SINGLE EVENT UPSETS; SPACE ENVIRONMENT; TOTAL IONIZING DOSE;

CMOS INTEGRATED CIRCUITS; ERROR CORRECTION; IONIZING RADIATION;

RADIATION EFFECTS;

EID: 84860145186     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RADECS.2011.6131334     Document Type: Conference Paper

References (11)

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