A task parallel algorithm for finding all-pairs shortest paths using the GPU

International Journal of High Performance Computing and Networking

Volumn 7, Issue 2, 2012, Pages 87-98

  Okuyama, Tomohiro ^a   Ino, Fumihiko ^a   Hagihara, Kenichi ^a  

^a OSAKA UNIVERSITY   (Japan)

Author keywords

Acceleration; All pairs shortest path; APSP; Compute unified device architecture; CUDA; GPU; Graph algorithm; Graphics processing unit; High performance computing

Indexed keywords

APSP; COMPUTE UNIFIED DEVICE ARCHITECTURES; CUDA; GPU; GRAPH ALGORITHMS; GRAPHICS PROCESSING UNIT; HIGH PERFORMANCE COMPUTING; SHORTEST PATH;

ACCELERATION; ALGORITHMS; COMPUTER GRAPHICS; DATA HANDLING; GRAPH THEORY; PARALLEL ARCHITECTURES; PROGRAM PROCESSORS; WIRELESS SENSOR NETWORKS;

COMPUTER GRAPHICS EQUIPMENT;

EID: 84859771997     PISSN: 17400562     EISSN: 17400570     Source Type: Journal    
DOI: 10.1504/IJHPCN.2012.046384     Document Type: Article

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