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Volumn , Issue , 2012, Pages 9-12

60 GHz low noise amplifiers with 1 kV CDM protection in 40 nm LP CMOS

Author keywords

[No Author keywords available]

Indexed keywords

EASE OF USE; ESD PROTECTION; MM-WAVE; PHASED ARRAY RECEIVER;

EID: 84858717193     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SiRF.2012.6160126     Document Type: Conference Paper
Times cited : (5)

References (12)
  • 3
    • 57949093321 scopus 로고    scopus 로고
    • Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications
    • S. Thijs et al., "Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications," in Proc. IEEE Custom Integrated Circuits Conf. CICC 2008, 2008, pp. 49-52.
    • (2008) Proc. IEEE Custom Integrated Circuits Conf. CICC 2008 , pp. 49-52
    • Thijs, S.1
  • 4
    • 84858740972 scopus 로고    scopus 로고
    • Field-Induced Charged-Device Model Test Method for ESD- Withstand Thresholds of Microelectronic Components
    • Available
    • Field-Induced Charged- Device Model Test Method for ESD- Withstand Thresholds of Microelectronic Components, JEDEC standard Std. [Online]. Available: http://www.jedec.org/download/search/22c101D.pdf
    • JEDEC Standard Std. [Online]
  • 6
    • 79959532017 scopus 로고    scopus 로고
    • Overview on ESD Protection Designs of Low Parasitic Capacitance for RF ICs in CMOS Technologies
    • early Access
    • M. D. Ker, C. Y. Lin, and Y. W. Hsiao, "Overview on ESD Protection Designs of Low Parasitic Capacitance for RF ICs in CMOS Technologies," IEEE Trans. Device Mater. Rel., no. 99, 2011, early Access.
    • (2011) IEEE Trans. Device Mater. Rel. , Issue.99
    • Ker, M.D.1    Lin, C.Y.2    Hsiao, Y.W.3
  • 7
    • 68549127045 scopus 로고    scopus 로고
    • Ladder-shaped network for ESD protection of millimetre-wave CMOS ICs
    • J.-D. Park and A. M. Niknejad, "Ladder-shaped network for ESD protection of millimetre-wave CMOS ICs," Electronics Letters, vol. 45, no. 15, pp. 795-797, 2009.
    • (2009) Electronics Letters , vol.45 , Issue.15 , pp. 795-797
    • Park, J.-D.1    Niknejad, A.M.2
  • 8
    • 34247326952 scopus 로고    scopus 로고
    • Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio
    • T. Yao et al., "Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio," IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1044-1057, 2007.
    • (2007) IEEE J. Solid-State Circuits , vol.42 , Issue.5 , pp. 1044-1057
    • Yao, T.1
  • 9
    • 33746927173 scopus 로고    scopus 로고
    • The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks
    • T. O. Dickson et al., "The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks," IEEE J. Solid-State Circuits, vol. 41, no. 8, pp. 1830-1845, 2006.
    • (2006) IEEE J. Solid-State Circuits , vol.41 , Issue.8 , pp. 1830-1845
    • Dickson, T.O.1
  • 11
    • 80555147510 scopus 로고    scopus 로고
    • ESD Protection Design with Low-Capacitance Consideration for High-Speed/High-Frequency I/O Interfaces in Integrated Circuits
    • June
    • M.-D. Ker and Y.-W. Hsiao, "ESD Protection Design With Low-Capacitance Consideration for High-Speed/High-Frequency I/O Interfaces in Integrated Circuits," Recent Patents on Engineering, vol. 1, no. 2, pp. 131-145, June 2007.
    • (2007) Recent Patents on Engineering , vol.1 , Issue.2 , pp. 131-145
    • Ker, M.-D.1    Hsiao, Y.-W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.