Performance study of harmony search algorithm for analog circuit sizing

Proceedings - 2011 International Symposium on Electronic System Design, ISED 2011

Volumn , Issue , 2011, Pages 12-17

  Kudikala, Shravan ^a   Sabat, Samrat L ^a   Udgata, Siba K ^a  

^a UNIVERSITY OF HYDERABAD   (India)

Author keywords

Circuit sizing; Differantial Evolution; Harmony Search

Indexed keywords

ANALOG CIRCUIT SIZING; CIRCUIT SIZING; CMOS PROCESSS; COMMON MODE FEEDBACK; CONTINUOUS TIME; DE ALGORITHMS; DIFFERANTIAL EVOLUTION; DIFFERENTIAL EVOLUTION ALGORITHMS; FITNESS EVALUATIONS; FOLDED-CASCODE; GLOBAL OPTIMUM; HARMONY SEARCH; HARMONY SEARCH ALGORITHMS; METAHEURISTIC; MIXED MODE; OPERATIONAL TRANS CONDUCTANCE AMPLIFIER; OPTIMIZATION ALGORITHMS; PERFORMANCE STUDY; TIME TO MARKET;

CMOS INTEGRATED CIRCUITS; DESIGN; ELECTRIC NETWORK ANALYSIS; EVOLUTIONARY ALGORITHMS; HEURISTIC ALGORITHMS; HEURISTIC METHODS; SYSTEMS ANALYSIS;

ANALOG CIRCUITS;

EID: 84856205440     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISED.2011.42     Document Type: Conference Paper

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