Generating a checking sequence with a minimum number of reset transitions

Automated Software Engineering

Volumn 17, Issue 3, 2010, Pages 217-250

  Hierons, R M ^a   Ural, H ^b  

^a BRUNEL UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF OTTAWA   (Canada)

Author keywords

Checking sequence generation; Distinguishing sequence; Finite state machine; Optimisation; Reset transition

Indexed keywords

CHECKING SEQUENCE; DISTINGUISHING SEQUENCES; FINITE STATE MACHINES; OPTIMISATIONS; RESET TRANSITION;

OPTIMIZATION;

CONTOUR FOLLOWERS;

EID: 84755161180     PISSN: 09288910     EISSN: 15737535     Source Type: Journal    
DOI: 10.1007/s10515-009-0061-0     Document Type: Article

References (27)

1. Aho, A.V., Dahbura, A.T., Lee, D., Uyar, M.U.: An optimization technique for protocol conformance test generation based on UIO sequences and Rural Chinese Postman Tours. In: Protocol Specification, Testing, and Verification VIII, Atlantic City, pp. 75-86. Elsevier, North-Holland (1988)
2. Barnett, M., Grieskamp, W., Nachmanson, L., Schulte, W., Tillmann, N., Veanes, M.: Towards a tool environment for model-based testing with AsmL. In: Formal Approaches to Testing. Lecture Notes in Computer Science, vol. 2931, pp. 252-266. Springer, Berlin (2003)
3. Binder, R.V.: Testing Object-Oriented Systems: Models, Patterns, and Tools. Addison-Wesley, Reading (1999)
4. Broekman, B., Notenboom, E.: Testing Embedded Software. Addison-Wesley, London (2003)
5. Chow, T.S.: Testing software design modelled by finite state machines. IEEE Trans. Softw. Eng. 4, 178-187 (1978)
6. da Silva Simão, A., Petrenko, A.: Generating checking sequences for partial reduced finite state machines. In: 20th IFIP TC 6/WG 6.1 International Conference Testing of Software and Communicating Systems, 8th International Workshop on Formal Approaches to Testing of Software (TestCom/FATES 2008). Lecture Notes in Computer Science, vol. 5047, pp. 153-168. Springer, Berlin (2008)
7. Dick, J., Faivre, A.: Automating the generation and sequencing of test cases from model-based specifications. In: FME '93, First International Symposium on Formal Methods in Europe, Odense, Denmark, 19-23 April 1993. Lecture Notes in Computer Science, vol. 670, pp. 268-284. Springer, Berlin (1993)
8. Duale, A.Y., Uyar, M.U.: A method enabling feasible conformance test sequence generation for EFSM models. IEEE Trans. Comput. 53(5), 614-627 (2004)
9. Farchi, E., Hartman, A., Pinter, S.: Using a model-based test generator to test for standard conformance. IBM Syst. J. 41(1), 89-110 (2002)
10. Friske, M., Schlingloff, B.-H.: Improving test coverage for UML state machines using transition instrumentation. In: 26th International Conference on Computer Safety, Reliability, and Security (SAFE-COMP). Lecture Notes in Computer Science, vol. 4680, pp. 301-314. Springer, Berlin (2007)
11. Fujiwara, S., Bochmann, G.V., Khendek, F., Amalou, M., Ghedamsi, A.: Test selection based on finite state models. IEEE Trans. Softw. Eng. 17(6), 591-603 (1991)
12. Gonenc, G.: A method for the design of fault detection experiments. IEEE Trans. Comput. 19, 551-558 (1970)
13. Harel, D., Politi, M.: Modeling Reactive Systems with Statecharts: The STATEMATE Approach. McGraw-Hill, New York (1998)
14. Haydar, M., Petrenko, A., Sahraoui, H.: Formal verification of web applications modeled by communicating automata. In: Formal Techniques for Networked and Distributed Systems (FORTE 2004), Madrid, September 2004. Springer Lecture Notes in Computer Science, vol. 3235, pp. 115-132. Springer, Berlin (2004)
15. Hennie, F.C.: Fault-detecting experiments for sequential circuits. In: Proceedings of Fifth Annual Symposium on Switching Circuit Theory and Logical Design, pp. 95-110. Princeton, NJ, November 1964
16. Hierons, R.M.: Minimizing the number of resets when testing from a finite state machine. Inf. Process. Lett. 90(6), 287-292 (2004)
17. Hierons, R.M., Ural, H.: Reduced length checking sequences. IEEE Trans. Comput. 51(9), 1111-1117 (2002)
18. Hierons, R.M., Ural, H.: Optimizing the length of checking sequences. IEEE Trans. Comput. 55(5), 618-629 (2006)
19. Hopcroft, J.E.: An n log n algorithm for minimizing the states in a finite automaton. In: Kohavi, Z. (ed.) The Theory of Machines and Computation, pp. 189-196. Academic Press, New York (1971)
20. ITU-T. Recommendation Z.100 Specification and description language (SDL). International Telecommunications Union, Geneva, Switzerland (1999)
21. Lee, D., Yannakakis, M.: Principles and methods of testing finite-state machines-a survey. Proc. IEEE 84(8), 1089-1123 (1996)
22. Lenstra, J.L., Khan, R.: On general routing problems. Networks 6, 273-280 (1976)
23. Luo, G.L., Bochmann, G.V., Petrenko, A.: Test selection based on communicating nondeterministic finite-state machines using a generalized Wp-method. IEEE Trans. Softw. Eng. 20(2), 149-161 (1994)
24. Moore, E.P.: Gedanken-experiments. In: Shannon, C., McCarthy, J. (eds.) Automata Studies. Princeton University Press, Princeton (1956)
25. Ural, H., Wu, X., Zhang, F.: On minimizing the lengths of checking sequences. IEEE Trans. Comput. 46(1), 93-99 (1997)
26. Vasilevskii, M.P.: Failure Diagnosis of Automata. Cybernetics. Plenum, New York (1973)
27. Yao, M., Petrenko, A., Bochmann, G.V.: Conformance testing of protocol machines without reset. In: Protocol Specification, Testing and Verification, XIII (C-16), pp. 241-256. Elsevier/North-Holland, Amsterdam (1993)