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Volumn 46, Issue 4, 2004, Pages 445-451
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Construction of two-level split-lot fractional factorial designs for multistage processes
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Author keywords
Block; Defining contrast; Grid representation; Split plot; Strip plot
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Indexed keywords
COMPUTER NETWORKS;
DEGREES OF FREEDOM (MECHANICS);
LOGIC DESIGN;
METRIC SYSTEM;
SEMICONDUCTOR MATERIALS;
STRUCTURED PROGRAMMING;
BLOCK;
DEFINING CONTRAST;
GRID REPRESENTATIONS;
SPLIT-PLOT;
STRIP-PLOT;
INTEGRATED CIRCUITS;
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EID: 8344261431
PISSN: 00401706
EISSN: None
Source Type: Trade Journal
DOI: 10.1198/004017004000000446 Document Type: Article |
Times cited : (17)
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References (13)
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