A 915MHz ultra-low power wake-up receiver with scalable performance and power consumption

European Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 543-546

  Huang, Xiongchuan ^a   Harpe, Pieter ^a   Dolmans, Guido ^a   De Groot, Harmke ^a  

^a HOLST CENTRE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; DATA-RATE; DOUBLE-SAMPLING; ON CHIPS; RECEIVER FRONT-ENDS; RF POWER DETECTOR; SCALABLE PERFORMANCE; ULTRA-LOW POWER; WAKE-UP RECEIVER; WIRELESS SENSOR;

CMOS INTEGRATED CIRCUITS; DETECTOR CIRCUITS; WAKES; WIRELESS SENSOR NETWORKS;

LOW POWER ELECTRONICS;

EID: 82955241395     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2011.6044942     Document Type: Conference Paper

References (8)

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3. N. Pletcher, J.M. Rabaey, S. Gambini. "A 52 μW wake-up receiver with -72 dBm sensitivity using an uncertain-IF architecture". IEEE Journal of Solid State Circuits, 44(1):269-280, January 2009;
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