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Volumn , Issue , 2011, Pages 223-226

915-MHz wireless 64-channel neural recording SoC with programmable mixed-signal FIR filters

Author keywords

[No Author keywords available]

Indexed keywords

CLOSED-LOOP; CMOS PROCESSS; DATA RATES; DC OFFSETS; FULLY DIFFERENTIAL AMPLIFIERS; FULLY INTEGRATED; LOW-DISTORTION; MAXIMUM OUTPUT POWER; MIXED SIGNAL; NEURAL RECORDINGS; RECORDING CHANNELS; SAR ADC; SUBTHRESHOLD; SYSTEM-ON-CHIP; WIRELESS TRANSMITTER;

EID: 82955201575     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2011.6044947     Document Type: Conference Paper
Times cited : (17)

References (7)
  • 3
    • 77952182738 scopus 로고    scopus 로고
    • An inductively powered scalable 32-channel wireless neural recording system-on-a-chip for neuroscience applications
    • Feb.
    • S. Lee, H. Lee, M. Kiani, U. Jow, and M. Ghovanloo, "An inductively powered scalable 32-channel wireless neural recording system-on-a-chip for neuroscience applications," IEEE International Solid-State Circuits Conference, pp. 120-121, Feb. 2010.
    • (2010) IEEE International Solid-State Circuits Conference , pp. 120-121
    • Lee, S.1    Lee, H.2    Kiani, M.3    Jow, U.4    Ghovanloo, M.5
  • 6
    • 57849164106 scopus 로고    scopus 로고
    • A reconfigurable FIR filter embedded in a 9b successive approximately ADC
    • September
    • J. Kang, D. T. Lin, L. Li, and M. P. Flynn, "A reconfigurable FIR filter embedded in a 9b successive approximately ADC," IEEE Custom Integrated Circuits Conference, pp. 711-714, September 2008.
    • (2008) IEEE Custom Integrated Circuits Conference , pp. 711-714
    • Kang, J.1    Lin, D.T.2    Li, L.3    Flynn, M.P.4
  • 7
    • 2442607953 scopus 로고    scopus 로고
    • A 6.5-Ghz energy-efficient BFSK modulator for wireless sensor applications
    • May
    • S. Cho and A. P. Chandrakasan, "A 6.5-Ghz energy-efficient BFSK modulator for wireless sensor applications," IEEE Journal of Solid-State Circuits, vol. 39, no. 5, pp. 731-739, May 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , Issue.5 , pp. 731-739
    • Cho, S.1    Chandrakasan, A.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.