Towards a model checker for NesC and wireless sensor networks

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 6991 LNCS, Issue , 2011, Pages 372-387

  Zheng, Manchun ^a   Sun, Jun ^b   Liu, Yang ^a   Dong, Jin Song ^a   Gu, Yu ^b  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b SINGAPORE UNIVERSITY OF TECHNOLOGY AND DESIGN   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL TASKS; DEADLOCK FREENESS; EXECUTION MODEL; LABELLED TRANSITION SYSTEMS; LANGUAGE STRUCTURE; MODEL CHECKER; MODELING LANGUAGES; NETWORK TOPOLOGY; OPERATIONAL SEMANTICS; SEMANTIC MODEL; STATE REACHABILITY; TEMPORAL PROPERTY;

COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION LANGUAGES; ELECTRIC NETWORK TOPOLOGY; FORMAL METHODS; MATHEMATICAL MODELS; MODEL CHECKING; SEMANTICS; SENSORS;

WIRELESS SENSOR NETWORKS;

EID: 80455162682     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-24559-6_26     Document Type: Conference Paper

References (29)

1. NesC@PAT, http://www.comp.nus.edu.sg/~pat/NesC/
2. Akyildiz, I.F., Su, W., Sankarasubramaniam, Y., Cayirci, E.: Wireless sensor networks: a survey. Computer Networks 38, 132-138 (2001)
3. Archer, W., Levis, P., Regehr, J.: Interface contracts for TinyOS. In: IPSN, pp. 158-165 (2007)
4. Bucur, D., Kwiatkowska, M.Z.: Software verification for TinyOS. In: IPSN, pp. 400-401 (2010)
5. Emerson, E.A., Jha, S., Peled, D.: Combining Partial Order and Symmetry Reductions. In: Brinksma, E. (ed.) TACAS 1997. LNCS, vol. 1217, pp. 19-34. Springer, Heidelberg (1997) (Pubitemid 127053050)
6. Gay, D., Levis, P., Culler, D.E.: Software design patterns for TinyOS. ACMTrans. Embedded Comput. Syst. 6(2) (2007)
7. Gay, D., Levis, P., Behren, R.v., Welsh, M., Brewer, E., Culler, D.: The nesC Language: A Holistic Approach to Networked Embedded Systems. In: PLDI, pp. 1-11 (2003)
8. Hanna, Y., Rajan, H.: Slede: Framework for automatic verification of sensor network security protocol implementations. In: ICSE Companion, pp. 427-428 (2009)
9. Hanna, Y., Rajan, H., Zhang, W.: Slede: a domain-specific verification framework for sensor network security protocol implementations. In: WISEC, pp. 109-118 (2008)
10. Hoare, C.A.R.: Communicating Sequential Processes. Prentice-Hall, Englewood Cliffs (1985)
11. Holzmann, G.J.: Design and Validation of Protocols: A Tutorial. Computer Networks and ISDN Systems 25(9), 981-1017 (1993)
12. Klues, K., Liang, C.-J.M., Paek, J., Musaloiu-Elefteri, R., Levis, P., Terzis, A., Govindan, R.: TOSThreads: thread-safe and non-invasive preemption in TinyOS. In: SenSys, pp. 127-140 (2009)
13. Kothari, N., Millstein, T.D., Govindan, R.: Deriving State Machines from TinyOS Programs Using Symbolic Execution. In: IPSN, pp. 271-282 (2008)
14. Levis, P., Gay, D.: TinyOS Programming, 1st edn. Cambridge University Press, Cambridge (2009)
15. Levis, P., Lee, N., Welsh, M., Culler, D.E.: TOSSIM: Accurate and Scalable Simulation of Entire TinyOS Applications. In: SenSys, pp. 126-137 (2003)
16. Levis, P., Madden, S., Polastre, J., Szewczyk, R., Woo, A., Gay, D., Hill, J., Welsh, M., Brewer, E., Culler, D.: TinyOS: An operating system for sensor networks. In: Ambient Intelligence. Springer, Heidelberg (2004)
17. Levis, P., Patel, N., Culler, D.E., Shenker, S.: Trickle: A Self-Regulating Algorithm for Code Propagation and Maintenance in Wireless Sensor Networks. In: NSDI, pp. 15-28 (2004)
18. Li, P., Regehr, J.: T-check: bug finding for sensor networks. In: IPSN, pp. 174-185 (2010)
19. Liu, Y., Sun, J., Dong, J.S.: An Analyzer for Extended Compositional Process Algebras. In: ICSE Companion, pp. 919-920. ACM, New York (2008)
20. Liu, Y., Sun, J., Dong, J.S.: Developing Model Checkers Using PAT. In: Bouajjani, A., Chin, W.-N. (eds.) ATVA 2010. LNCS, vol. 6252, pp. 371-377. Springer, Heidelberg (2010)
21. Manna, Z., Pnueli, A.: The Temporal Logic of Reactive and Concurrent Systems: Specification. Springer, Heidelberg (1992)
22. Menrad, V., Garcia, M., Schupp, S.: Improving TinyOS Developer Productivity with State Charts. In: SOMSED (2009)
23. Nguyen, N.T.M., Soffa, M.L.: Program representations for testing wireless sensor network applications. In: DOSTA, pp. 20-26 (2007)
24. Peled, D.: Combining Partial Order Reductions with On-the-fly Model-Checking. Formal Methods in System Design 8(1), 39-64 (1996)
25. Sun, J., Liu, Y., Dong, J.S., Pang, J.: PAT: Towards Flexible Verification under Fairness. In: Bouajjani, A., Maler, O. (eds.) CAV 2009. LNCS, vol. 5643, pp. 709-714. Springer, Heidelberg (2009)
26. Sun, J., Liu, Y., Dong, J.S., Zhang, X.: Verifying Stateful Timed CSP Using Implicit Clocks and Zone Abstraction. In: Breitman, K., Cavalcanti, A. (eds.) ICFEM2009. LNCS, vol. 5885, pp. 581-600. Springer, Heidelberg (2009)
27. Sun, J., Liu, Y., Roychoudhury, A., Liu, S., Dong, J.S.: Fair model checking with process counter abstraction. In: Cavalcanti, A., Dams, D.R. (eds.) FM 2009. LNCS, vol. 5850, pp. 123-139. Springer, Heidelberg (2009)
28. Sun, J., Song, S., Liu, Y.: Model Checking Hierarchical Probabilistic Systems. In: Dong, J.S., Zhu, H. (eds.) ICFEM 2010. LNCS, vol. 6447, pp. 388-403. Springer, Heidelberg (2010)
29. Zhang, S.J., Sun, J., Pang, J., Liu, Y., Dong, J.S.: On Combining State Space Reductions with Global Fairness Assumptions. In: Butler, M., Schulte, W. (eds.) FM 2011. LNCS, vol. 6664, pp. 432-447. Springer, Heidelberg (2011)