Towards 1X DRAM: Improved leakage 0.4 nm EOT STO-based MIMcap and explanation of leakage reduction mechanism showing further potential

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2011, Pages 168-169

  Pawlak, M A ^a   Kaczer, B ^a   Wang, Wan Chih ^b   Kim, Min Soo ^a   Popovici, M ^a   Swerts, J ^a   Tomida, K ^a   Opsomer, K ^a   Schaekers, M ^a   Vrancken, C ^a   Govoreanu, B ^a   Belmonte, A ^a   Demeurisse, C ^a   Debusschere, I ^a   Altimime, L ^a   Afanas'ev, V V ^b   Kittl, J A ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BOTTOM ELECTRODES; FERMI LEVEL PINNING; LEAKAGE REDUCTION; LOW LEAKAGE; OXYGEN SCAVENGING; THEORETICAL LIMITS; TIO; TRAP DENSITY;

RUTHENIUM ALLOYS; SCAVENGING; TITANIUM NITRIDE;

RUTHENIUM COMPOUNDS;

EID: 80052683671     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. M. A. Pawlak et al., p. 277, IEDM 2010;
2. N. Mise et al., p. 267, IEDM 2009;
3. O. S. Kwon et al., J. Electrochem. Soc. 154, G127 (2007);
4. S. W. Lee et al., Appl. Phys. Lett. 92, 222903 (2008);
5. S. K. Kim et al., Advanced Materials 20, p. 1429 (2008).