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Volumn , Issue , 2011, Pages 302-303

A non-volatile look-up table design using PCM (phase-change memory) cells

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; LOGIC FUNCTIONS; LOOK UP TABLE; NON-VOLATILE; PCRAM CELLS; PHASE CHANGES; PHASE-CHANGE RANDOM ACCESS MEMORY; PROPAGATION DELAYS; TRANSFORMATION RATIO;

EID: 80052661765     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (28)

References (5)
  • 1
    • 4544355253 scopus 로고    scopus 로고
    • Current status of the phase change memory and its future
    • S. Lai, "Current status of the phase change memory and its future", IEDM, 2003, pp. 10.1.1-4.
    • (2003) IEDM
    • Lai, S.1
  • 2
    • 84889606863 scopus 로고    scopus 로고
    • A Phase-change via-Reconfigurable On-Chip Inductor
    • Cheng-Yuan Wen et al., "A Phase-change via-Reconfigurable On-Chip Inductor", IEDM, 2010, pp. 237-240.
    • (2010) IEDM , pp. 237-240
    • Wen, C.-Y.1
  • 3
    • 37549026786 scopus 로고    scopus 로고
    • Programmable via Using Indirectly Heated Phase-Change Switch for Reconfigurable Logic Applications
    • K. N. Chen et al., "Programmable via Using Indirectly Heated Phase-Change Switch for Reconfigurable Logic Applications", IEEE Electron Device Letters, vol. 29, 2008, pp. 131.
    • (2008) IEEE Electron Device Letters , vol.29 , pp. 131
    • Chen, K.N.1
  • 4
    • 70449359801 scopus 로고    scopus 로고
    • Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto/Semiconductor-Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array
    • Daisuke Suzuki et al., "Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto/Semiconductor-Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array", IEEE VLSI Circuits Symposium, 2009, pp. 80-81.
    • IEEE VLSI Circuits Symposium, 2009 , pp. 80-81
    • Suzuki, D.1
  • 5
    • 80052653327 scopus 로고    scopus 로고
    • A Novel SPRAM (Spin-transfer torque RAM)-based Reconfigurable Logic Block for 3D-Stacked reconfigurable Spin Processor
    • M. Sekikawa et al., "A Novel SPRAM (Spin-transfer torque RAM)-based Reconfigurable Logic Block for 3D-Stacked reconfigurable Spin Processor", IEDM, 2008, pp. 1-3.
    • (2008) IEDM , pp. 1-3
    • Sekikawa, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.