Comprehensive SRAM design methodology for RTN reliability

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2011, Pages 130-131

  Takeuchi, Kiyoshi ^a   Nagumo, Toshiharu ^a   Hase, Takashi ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLITUDE DISTRIBUTIONS; COMPREHENSIVE DESIGNS; DETAILED DESIGN; EXTRAPOLATION METHODS; INTUITIVE UNDERSTANDING; MONTE CARLO SIMULATION; RANDOM TELEGRAPH NOISE; SRAM DESIGN; TEST RESULTS;

COMPUTER SIMULATION; LOGIC DESIGN; MONTE CARLO METHODS; TELEGRAPH;

VLSI CIRCUITS;

EID: 80052660507     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. K. Takeuchi et al., 2009 Symp. VLSI Tech. p.54.
2. K. Takeuchi et al., 2010 Symp. VLSI Tech. p.189.
3. Y.-H. Lee et al., 2003 IEDM, p.353.
4. V. Reddy et al., 2004 ITC, p.148.
5. S. Realov et al., 2010 IEDM, p.624.