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Volumn , Issue , 2011, Pages 3083-3091

Pipelining packet scheduling in a low latency optical packet switch

Author keywords

Optical switches; packet scheduling; pipelined algorithm

Indexed keywords

ARBITRARY NUMBER; AVERAGE PACKET DELAYS; COMMON PROBLEMS; CUT-THROUGH; ELECTRONIC BUFFER; HIGH SPEED SYSTEMS; LINE CARD; LOW LATENCY; OPTICAL PACKET SWITCHES; OPTICAL SWITCHING ARCHITECTURE; PACKET SCHEDULING; PIPELINED ALGORITHMS; RANDOM ACCESS MEMORIES; SCHEDULING COMPLEXITY; SCHEDULING PROBLEM; SIMULATION RESULT; TIME CONSTRAINTS; TIME SCHEDULES; TIME SLOTS; TRAFFIC INTENSITY;

EID: 79960850756     PISSN: 0743166X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/INFCOM.2011.5935153     Document Type: Conference Paper
Times cited : (2)

References (21)
  • 2
    • 40749142392 scopus 로고    scopus 로고
    • Performance of a speculative transmission scheme for scheduling-latency reduction
    • Feb.
    • I. Iliadis and C. Minkenberg, "Performance of a speculative transmission scheme for scheduling-latency reduction," IEEEJACM Trans. Networking, vol. 16, no. 1, pp. 182-195, Feb. 2008.
    • (2008) IEEEJACM Trans. Networking , vol.16 , Issue.1 , pp. 182-195
    • Iliadis, I.1    Minkenberg, C.2
  • 4
    • 33747080227 scopus 로고    scopus 로고
    • Designing a crossbar scheduler for HPC applications
    • May
    • C. Minkenberg, et. al, "Designing a crossbar scheduler for HPC applications," IEEE Micro, vol. 26, pp. 58-71, May 2006.
    • (2006) IEEE Micro , vol.26 , pp. 58-71
    • Minkenberg, C.1
  • 5
  • 6
    • 34247354449 scopus 로고    scopus 로고
    • Ultracompact optical buffers on a silicon chip
    • F. Xia, L. Sekaric and Y. Vlasov, "Ultracompact optical buffers on a silicon chip,", Nature Photonics 1, 2007.
    • (2007) Nature Photonics , vol.1
    • Xia, F.1    Sekaric, L.2    Vlasov, Y.3
  • 8
    • 33645929406 scopus 로고    scopus 로고
    • Shared fiber delay line buffers in asynchronous optical packet switches
    • April
    • T. Zhang, K. Lu and J.P. Jue, "Shared fiber delay line buffers in asynchronous optical packet switches," IEEE Journal on Selected Areas in Communications, vol. 24, no. 4, pp. 118 - 127, April 2006.
    • (2006) IEEE Journal on Selected Areas in Communications , vol.24 , Issue.4 , pp. 118-127
    • Zhang, T.1    Lu, K.2    Jue, J.P.3
  • 10
    • 33745082833 scopus 로고    scopus 로고
    • Exact emulation of a priority queue with a switch and delay lines
    • Jul.
    • A.D. Sarwate and V. Ananthararn, "Exact emulation of a priority queue with a switch and delay lines," Queueing Systems: Theory and Applications, vol. 53, pp. 115-125, Jul. 2006.
    • (2006) Queueing Systems: Theory and Applications , vol.53 , pp. 115-125
    • Sarwate, A.D.1    Ananthararn, V.2
  • 12
    • 0036343638 scopus 로고    scopus 로고
    • Maintaining packet order in two-stage switches
    • New York, June
    • I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," IEEE INFO COM '02, New York, June 2002.
    • (2002) IEEE INFO COM '02
    • Keslassy, I.1    McKeown, N.2
  • 15
    • 0032655137 scopus 로고    scopus 로고
    • The iSLIP scheduling algorithm for input-queued switches
    • N. McKeown, "The iSLIP scheduling algorithm for input-queued switches," IEEEIACM Trans. Networking, vol. 7, no. 2, pp. 188-201, 1999.
    • (1999) IEEEIACM Trans. Networking , vol.7 , Issue.2 , pp. 188-201
    • McKeown, N.1
  • 16
    • 0033296923 scopus 로고    scopus 로고
    • RRGS-round-robin greedy scheduling for electronic/optical terabitswitches
    • A. Smiljanic, R. Fan and G. Ramamurthy, "RRGS-round-robin greedy scheduling for electronic/optical terabitswitches," GLOBECOM 1999, pp. 1244-1250, 1999.
    • (1999) GLOBECOM 1999 , pp. 1244-1250
    • Smiljanic, A.1    Fan, R.2    Ramamurthy, G.3
  • 17
    • 0035362109 scopus 로고    scopus 로고
    • A pipeline-based approach for maximal-sized matching scheduling in input-buffered switches
    • Jun.
    • E. Oki, R. Rojas-Cessa and H. Chao, "A pipeline-based approach for maximal-sized matching scheduling in input-buffered switches," IEEE Communication Letters, vol. 5, pp. 263-265, Jun. 2001.
    • (2001) IEEE Communication Letters , vol.5 , pp. 263-265
    • Oki, E.1    Rojas-Cessa, R.2    Chao, H.3
  • 20
    • 39749158011 scopus 로고    scopus 로고
    • Mailbox switch: A scalable two-stage switch architecture for conflict resolution of ordered packets
    • Jan.
    • C.-S. Chang, O.-S. Lee, Y-J. Shih and C-L Yu, "Mailbox switch: a scalable two-stage switch architecture for conflict resolution of ordered packets," IEEE Trans. Communications, vol. 56, no. 1, pp. 136-149, Jan. 2008.
    • (2008) IEEE Trans. Communications , vol.56 , Issue.1 , pp. 136-149
    • Chang, C.-S.1    Lee, O.-S.2    Shih, Y.-J.3    Yu, C.-L.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.