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Volumn , Issue , 2010, Pages 209-212

Power noise suppression technique using active decoupling capacitor for TSV 3D integration

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; 65NM CMOS TECHNOLOGY; DECOUPLING CAPACITOR; LOW POWER; NOISE DETECTION; NOISE SUPPRESSION; POWER NOISE; POWER-SUPPLY NOISE; SIMULTANEOUS SWITCHING NOISE; SUPPLY CURRENTS; SUPPLY NOISE; SUPPLY VOLTAGES; THREE DIMENSIONAL (3D) INTEGRATION; THROUGH-SILICON-VIA;

EID: 79960726095     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCC.2010.5784737     Document Type: Conference Paper
Times cited : (5)

References (7)
  • 1
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    • Power delivery for 3D chip stacks: Physical modeling and design implication
    • Oct.
    • G. Huang, et al., "Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication," Electrical perform. of Electron. Packaging, pp 205-208, Oct. 2007.
    • (2007) Electrical Perform. of Electron. Packaging , pp. 205-208
    • Huang, G.1
  • 3
    • 57549119325 scopus 로고    scopus 로고
    • A multi-story power delivery technique for 3D integrated circuits
    • Aug.
    • P. Jain, et al., "A Multi-Story Power Delivery Technique for 3D Integrated Circuits," Proc. IEEE Int. Symp. Low Power Electron. and Des., pp. 57-62, Aug. 2008.
    • (2008) Proc. IEEE Int. Symp. Low Power Electron. and Des. , pp. 57-62
    • Jain, P.1
  • 4
    • 59349090150 scopus 로고    scopus 로고
    • An improved active decoupling capacitor for hot-spot supply noise reduction in ASIC designs
    • Feb.
    • X. Meng, and R. Saleh," An Improved Active Decoupling Capacitor for Hot-Spot Supply Noise Reduction in ASIC Designs," IEEE J. Solid-State Circuits, Vol. 44, No. 2, pp584-593, Feb. 2009.
    • (2009) IEEE J. Solid-State Circuits , vol.44 , Issue.2 , pp. 584-593
    • Meng, X.1    Saleh, R.2
  • 5
    • 67649666674 scopus 로고    scopus 로고
    • On-chip supply noise regulation using a low-power digital switched decoupling capacitor circuit
    • Jun.
    • J. Gu, et al., "On-Chip Supply Noise Regulation Using a Low-Power Digital Switched Decoupling Capacitor Circuit," IEEE J. Solid-State Circuits, pp1765-1775, Jun. 2009.
    • (2009) IEEE J. Solid-State Circuits , pp. 1765-1775
    • Gu, J.1
  • 6
    • 0001050518 scopus 로고    scopus 로고
    • MOS charge pumps for low-voltage operation
    • PII S0018920098023300
    • J.-T. Wu and K.-L. Chang, "MOS Charge Pump for LowVoltage Operation," IEEE J. Solid-State Circuits, Vol. 33, No. 4, pp. 592-597, Apr.1998. (Pubitemid 128566766)
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , Issue.4 , pp. 592-597
    • Wu, J.-T.1    Chang, K.-L.2
  • 7
    • 69549108427 scopus 로고    scopus 로고
    • Closed-form expressions of 3-D via resistance, inductance, and capacitance
    • Sept.
    • I. Savidis and E.G. Friedman, "Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance," IEEE Tran. on Electron Device, Vol. 56, No. 9, pp. 1873-1881, Sept. 2009
    • (2009) IEEE Tran. on Electron Device , vol.56 , Issue.9 , pp. 1873-1881
    • Savidis, I.1    Friedman, E.G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.