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Volumn , Issue , 2011, Pages 507-510

Power and data for a wireless implanted neural recording system

Author keywords

[No Author keywords available]

Indexed keywords

CLASS E; DATA CHANNELS; INTEGER-N; NEURAL RECORDINGS; POWER LINKS; SELF-BIASING TECHNIQUE; TWO WAY COMMUNICATIONS;

EID: 79960362367     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NER.2011.5910597     Document Type: Conference Paper
Times cited : (6)

References (8)
  • 5
    • 0030290680 scopus 로고    scopus 로고
    • Low-jitter process-independent DLL and PLL based on self-biased techniques
    • Nov
    • J. Maneatis, "Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques", IEEE Journal of Solid-State Circuits, vol. 31, no. 11, pp. 1723-1732, Nov. 1996.
    • (1996) IEEE Journal of Solid-State Circuits , vol.31 , Issue.11 , pp. 1723-1732
    • Maneatis, J.1
  • 7
    • 0029244247 scopus 로고
    • Design of high-speed, low-power frequency dividers and phase-locked loops in deep submicron CMOS
    • Feb
    • B. Razavi, K. Lee, R. Yan, "Design of High-Speed, Low-Power Frequency Dividers and Phase-Locked Loops in Deep Submicron CMOS", IEEE Journal of Solid-State Circuits, vol. 30, no. 2, pp. 101-109, Feb. 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , Issue.2 , pp. 101-109
    • Razavi, B.1    Lee, K.2    Yan, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.