The operation algorithm for improving the reliability of TLC (triple level cell) NAND flash characteristics

2011 3rd IEEE International Memory Workshop, IMW 2011

Volumn , Issue , 2011, Pages

  Lee, Dong Wook ^a   Cho, Sunghoon ^a   Kang, Byung Woo ^a   Park, Sukkwang ^a   Park, Byoungjun ^a   Cho, Myoung Kwan ^a   Ahn, Kun Ok ^a   Yang, Ye Seok ^a   Park, Sung Wook ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

LOW COSTS; MARKET DEMAND; NAND FLASH; OPERATION ALGORITHM; STEP PULSE;

ALGORITHMS;

FLASH MEMORY;

EID: 79959940144     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2011.5873234     Document Type: Article

References (3)

1. M. Bauer, et al., ISSCC, pp.132-133, 1995
2. S. Park, et al., Flash memory summit, Aug.2010
3. C. Lee, et al., IEEE J. Solid-State Circuits, vol.46, pp97-106. 2011