Compiler optimizations for parallelizing general-purpose applications under Thread-Level Speculation

Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Volumn , Issue , 2008, Pages 271-272

  Zhai, Antonia ^a   Wang, Shengyue ^a   Yew, Pen Chung ^a   He, Guojin ^a  

^a University of Minnesota   (United States)

Author keywords

Compiler optimizations; Multicore systems; Parallelizing compiler; Thread Level speculation

Indexed keywords

EID: 79959407811     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1345206.1345251     Document Type: Conference Paper

References (7)

1. HAMMOND, L., WILLEY, M., AND OLUKOTUN, K. Data Speculation Support for a Chip Multiprocessor. In ASPLOS'95 (October 1998).
2. KRISHNAN, V., AND TORRELLAS, J. The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors. In PACT'99 (October 1999).
3. MARCUELLO, P., AND GONZALEZ, A. Clustered Speculative Multithreaded Processors. In 13th Annual ACM International Conference on Supercomputing (Rhodes, Greece, June 1999).
4. SOHI, G. S., BREACH, S., AND VIJAYKUMAR, T. N. Multiscalar Processors. In 22nd Annual International Symposium on Computer Architecture (ISCA '95) (June 1995), pp. 414-425.
5. STEFFAN, J. G., COLOHAN, C. B., ZHAI, A., AND MOWRY, T. C. A Scalable Approach to Thread-Level Speculation. In ISCA'00 (June 2000).
6. ZHAI, A., COLOHAN, C. B., STEFFAN, J. G., AND MOWRY, T. C. Compiler Optimization of Scalar Value Communication Between Speculative Threads. In ASPLOS' 02 (Oct 2002).
7. ZHAI, A., COLOHAN, C. B., STEFFAN, J. G., AND MOWRY, T. C. Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. In CGO'04 (Mar 2004).