Analysis of multiple cell upsets due to neutrons in SRAMs for a Deep-N-well process

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2011, Pages

  Mahatme, Nihaar ^a   Bhuva, Bharat ^a   Fang, Y P ^b   Oates, Anthony ^b  

^a VANDERBILT UNIVERSITY   (United States)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

multiple bit upset (MBU); multiple cell upset (MCU); single bit upset (SBU); Soft Error Rate; SRAMs

Indexed keywords

MULTIPLE BIT UPSET; MULTIPLE-CELL UPSETS; SINGLE-BIT; SOFT ERROR RATE; SRAMS;

THREE DIMENSIONAL COMPUTER GRAPHICS;

RELIABILITY ANALYSIS;

EID: 79959285226     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2011.5784599     Document Type: Conference Paper

References (8)

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