A 1V printed organic DRAM cell based on ion-gel gated transistors with a sub-10nW-per-cell refresh power

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 326-327

  Zhang, Wei ^a   Ha, Mingjing ^a   Braga, Daniele ^a   Renn, Michael J ^b   Frisbie, C Daniel ^a   Kim, Chris H ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

^b Optomec Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSTS; INTEGRATED CIRCUIT MANUFACTURE; TEMPERATURE;

CIRCUIT DESIGNS; FLEXIBLE SYSTEM; LARGE-AREA ELECTRONICS; LOW COST MANUFACTURING; LOW TEMPERATURE PROCESSING; ORGANIC THIN FILM TRANSISTOR (OTFTS); SILICON-BASED TRANSISTORS; STRUCTURAL FLEXIBILITIES;

THIN FILM TRANSISTORS;

EID: 79955733957     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2011.5746339     Document Type: Conference Paper

References (4)

1. M. Takamiya, T. Sekitani, Y. Kato, et al., "An Organic FET SRAM With Back Gate to Increase Static Noise Margin and Its Application to Braille Sheet Display", IEEE J. Solid-State Circuits, vol. 42, no. 1, pp. 93-100, Jan. 2007.
2. R. Blache, J. Krumm, and W. Fix, "Organic CMOS Circuits for RFID Applications", ISSCC Dig. Tech. Papers, pp. 208-109, Feb. 2009.
3. Y. Xia, W. Zhang, M. Ha, et al., "Printed Sub-2 V Gel-Electrolyte-Gated Polymer Transistors and Circuits", Advanced Functional Materials, vol. 20, no. 4, pp. 587-594, Feb. 2010.
4. K. Chun, P. Jain, T. Kim, et al., "A 1.1V, 667MHz Random Cycle, Asymmetric 2T Gain Cell Embedded DRAM with a 99.9 Percentile Retention Time of 110μsec", Symposium on VLSI Circuits, pp. 191-192, June 2010.