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Volumn , Issue , 2011, Pages 247-251

An analytical approach to the design of parallel block cipher encryption/decryption: A CPU/GPU case study

Author keywords

AES; block cipher; divisible load theory; GPGPU; heterogeneous computing

Indexed keywords

AES; BLOCK CIPHERS; DIVISIBLE LOAD THEORY; GPGPU; HETEROGENEOUS COMPUTING;

EID: 79955009172     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PDP.2011.51     Document Type: Conference Paper
Times cited : (13)

References (10)
  • 1
    • 78649268516 scopus 로고    scopus 로고
    • November
    • FIPS 197. http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf, November 2001.
    • (2001) FIPS 197
  • 2
    • 77954313088 scopus 로고    scopus 로고
    • An analytical approach to optimizing parallel image registration/ retrieval
    • Aug.
    • Gerassimos Barlas. An analytical approach to optimizing parallel image registration/retrieval. IEEE Trans. on Parallel & Distr. Systems, Vol. 21, No. 8, Aug. 2010, pp. 1074-1088
    • (2010) IEEE Trans. on Parallel & Distr. Systems , vol.21 , Issue.8 , pp. 1074-1088
    • Barlas, G.1
  • 4
    • 57349172004 scopus 로고    scopus 로고
    • Biomedical image analysis on a cooperative cluster of GPUs and multicores
    • Island of Kos, Greece, June 7-12
    • T. D. R. Hartley, U. Catalyurek, A. Ruiz, F. Igual, R. Mayo, and M. Ujaldon. Biomedical image analysis on a cooperative cluster of GPUs and multicores. In ICS'08, Island of Kos, Greece, June 7-12 2008.
    • (2008) ICS'08
    • Hartley, T.D.R.1    Catalyurek, U.2    Ruiz, A.3    Igual, F.4    Mayo, R.5    Ujaldon, M.6
  • 7
    • 51049111938 scopus 로고    scopus 로고
    • CUDA compatible GPU as an efficient hardware accelerator for AES cryptography
    • Dubai, UAE, November
    • Svetlin A. Manavski. CUDA compatible GPU as an efficient hardware accelerator for AES cryptography. In IEEE Intern. Conf. on Signal Proc. and Commun., ICSPC 2007, pp. 65-68, Dubai, UAE, November 2007.
    • (2007) IEEE Intern. Conf. on Signal Proc. and Commun., ICSPC 2007 , pp. 65-68
    • Manavski, S.A.1
  • 10
    • 51249099634 scopus 로고    scopus 로고
    • High-speed implementations of block cipher aria using graphics processing units
    • April
    • Yongjin Yeom, Yongkuk Cho, and Moti Yung. High-speed implementations of block cipher aria using graphics processing units. In Intern. Conf. on Multimedia and Ubiquitous Engin., pp. 271-275, April 2008.
    • (2008) Intern. Conf. on Multimedia and Ubiquitous Engin. , pp. 271-275
    • Yeom, Y.1    Cho, Y.2    Yung, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.