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Volumn , Issue , 2008, Pages 271-275

High-speed implementations of block cipher ARIA using graphics processing units

Author keywords

[No Author keywords available]

Indexed keywords

BLOCK CIPHERS; HIGH SPEEDS; INTERNATIONAL CONFERENCES;

EID: 51249099634     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MUE.2008.94     Document Type: Conference Paper
Times cited : (11)

References (16)
  • 4
    • 33646728555 scopus 로고    scopus 로고
    • Cryptographics: Secret key cryptography using graphics cards
    • D. L. Cook, J. Ioannidis, A. D. Keromytis, and J. Luck. Cryptographics: Secret key cryptography using graphics cards. In CT-RSA, 2005,
    • (2005) CT-RSA
    • Cook, D.L.1    Ioannidis, J.2    Keromytis, A.D.3    Luck, J.4
  • 6
    • 51249103550 scopus 로고    scopus 로고
    • NVIDIA CUDA, http://developer.nvidia.com/,
  • 7
    • 79551535337 scopus 로고    scopus 로고
    • AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
    • O. Harrison, J. Waldron, AES Encryption Implementation and Analysis on Commodity Graphics Processing Units. In CHES, 2007.
    • (2007) CHES
    • Harrison, O.1    Waldron, J.2
  • 11
    • 51249088532 scopus 로고    scopus 로고
    • at Stanford university
    • GPUbench project at Stanford university, http://graphics.stanford.edu/ projects/gpubench/.
    • GPUbench project
  • 14
    • 84982318971 scopus 로고    scopus 로고
    • General-Purpose Computation on Graphics Hardware
    • GPGPU
    • M. Houston, GPGPU: General-Purpose Computation on Graphics Hardware. Course at SIGGRAPH 2007.
    • Course at SIGGRAPH 2007
    • Houston, M.1
  • 15
    • 38149007462 scopus 로고    scopus 로고
    • AES Encryption and Decryption on the GPU
    • T. Yamanouchi, AES Encryption and Decryption on the GPU, GPU Gems 3, NVIDIA, 2007.
    • (2007) GPU Gems 3, NVIDIA
    • Yamanouchi, T.1
  • 16
    • 51249125012 scopus 로고    scopus 로고
    • The Smallest ARIA Module with 16-Bit Architecture
    • Sangwoon Yang, Jinsub Park, and Younggap You, The Smallest ARIA Module with 16-Bit Architecture. ICISC, 2006.
    • (2006) ICISC
    • Yang, S.1    Park, J.2    You, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.