A new parallel algorithm for full-digital phase-locked loop for high-throughput carrier and timing recovery systems

2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Volumn , Issue , 2010, Pages 1156-1159

  Kondou, Keitarou ^a   Noda, Makoto ^a  

^a SONY CORPORATION   (Japan)

Author keywords

Carrier recovery; Interpolated timing recovery; Millimeter wave; Phase locked loop

Indexed keywords

BIT RATES; CARRIER RECOVERY; CMOS TECHNOLOGY; CONVENTIONAL ALGORITHMS; CONVERGENCE TIME; FREQUENCY RANGES; FULL-DIGITAL; HIGH-THROUGHPUT; INTERPOLATED TIMING RECOVERY; PULL-IN; TIMING RECOVERY SYSTEM; WIRELESS COMMUNICATIONS;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; CONVERGENCE OF NUMERICAL METHODS; MILLIMETER WAVE DEVICES; MILLIMETER WAVES; PARALLEL ARCHITECTURES; RECOVERY; WIRELESS TELECOMMUNICATION SYSTEMS;

PHASE LOCKED LOOPS;

EID: 79953117303     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2010.5724722     Document Type: Conference Paper

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