Novel application of wafer-bonded MultiSOI: Junctionless nanowire transistors for CMOS logic

ECS Transactions

Volumn 33, Issue 4, 2010, Pages 169-173

  Wessely, F ^a   Krauss, T ^a   Schwalke, U ^a  

^a DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; NANOWIRES; RECONFIGURABLE HARDWARE; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES; WAFER BONDING;

BACK-GATE VOLTAGES; CIRCUIT DESIGNS; FABRICATION AND CHARACTERIZATIONS; NANOWIRE TRANSISTORS; NOVEL APPLICATIONS; RECONFIGURABLE LOGIC; SILICON-ON-INSULATOR SUBSTRATES; SOI SUBSTRATES;

SILICON WAFERS;

EID: 79952670262     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3483505     Document Type: Conference Paper

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