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Volumn 6502 LNCS, Issue , 2011, Pages 117-128

Optimizing regular edge labelings

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CHIPS; FLOORPLANS; LABELINGS; OPTIMIZATION PROBLEMS; QUALITY CRITERIA; TREE-MAPS; UPPER AND LOWER BOUNDS; NEAR-OPTIMAL; REGULAR EDGE LABELING;

EID: 79952263929     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-18469-7_11     Document Type: Conference Paper
Times cited : (6)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.