Fully integrated 54nm STT-RAM with the smallest bit cell dimension for high density memory application

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2010, Pages

  Chung, Suock ^a   Rho, K M ^a   Kim, S D ^a   Suh, H J ^a   Kim, D J ^a   Kim, H J ^a   Lee, S H ^a   Park, J H ^a   Hwang, H M ^a   Hwang, S M ^a   Lee, J Y ^a   An, Y B ^a   Yi, J U ^a   Seo, Y H ^a   Jung, D H ^a   Lee, M S ^a   Cho, S H ^a   Kim, J N ^a   Park, G J ^a   Jin, Gyuan ^a   Driskill Smith, A ^b   Nikitin, V ^b   Ong, A ^b   Tang, X ^b   Kim, Yongki ^a   Rho, J S ^a   Park, S K ^a   Chung, S W ^a   Jeong, J G ^a   Hong, S J ^a   more..

^a Hynix Semiconductor Inc   (South Korea)

^b Grandis Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIT CELL; CURRENT DRIVABILITY; DIRECT ACCESS; FULLY INTEGRATED; HIGH DENSITY MEMORY; SCALING TRENDS; SINGLE-BIT; SPIN TRANSFER TORQUE; SWITCHING BEHAVIORS; SWITCHING PERFORMANCE; TECHNOLOGY NODES; UNIT-CELL DIMENSIONS;

ELECTRON DEVICES;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 79951816462     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2010.5703351     Document Type: Conference Paper

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