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Volumn , Issue , 2010, Pages 323-327

Enhanced low-power high-speed adder for error-tolerant application

Author keywords

Adders; Error rate; Error tolerance (ET); High speed integrated circuits; Low power design

Indexed keywords

DESIGN CONSIDERATIONS; ERROR RATE; ERROR TOLERANT; HIGH SPEED INTEGRATED CIRCUITS; HIGH-SPEED; HIGH-SPEED ADDERS; LARGE DATA; LOW POWER; LOW-POWER DESIGN; POWER CONSUMPTION; SPEED PERFORMANCE; SUB-100 NM;

EID: 79851489663     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2010.5682905     Document Type: Conference Paper
Times cited : (114)

References (10)
  • 3
    • 42649096641 scopus 로고    scopus 로고
    • An Illustrated Methodology for Analysis of Error Tolerance
    • M. A. Breuer and H. Zhu, "An Illustrated Methodology for Analysis of Error Tolerance," IEEE Design and Test Magazine, pp. 168-177, 2008.
    • (2008) IEEE Design and Test Magazine , pp. 168-177
    • Breuer, M.A.1    Zhu, H.2
  • 4
    • 44049104160 scopus 로고    scopus 로고
    • On Energy-Reliability Tradeoff in analog-to-Digital Converters with Imperfect Comparators
    • H. Kakavand and A. El Gamal, "On Energy-Reliability Tradeoff in analog-to-Digital Converters with Imperfect Comparators," Proc. 40th Ann. Conf. Information Sciences and Systems (CISS 06), pp. 1366-1371; http://www288.pair.com/ciss/ciss/numbered/297.pdf.
    • Proc. 40th Ann. Conf. Information Sciences and Systems (CISS 06) , pp. 1366-1371
    • Kakavand, H.1    El Gamal, A.2
  • 7
    • 79851475531 scopus 로고    scopus 로고
    • Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing"
    • accepted for publication in
    • Zhu Ning, Zhang Weijia, Goh Wang Ling, Yeo Kiat Seng, and Kong Zhi Hui, "Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing", accepted for publication in IEEE Transactions on Very Large Scale Integration Systems II.
    • IEEE Transactions on Very Large Scale Integration Systems II
    • Ning, Z.1    Weijia, Z.2    Ling, G.W.3    Seng, Y.K.4    Hui, K.Z.5
  • 8
    • 84937351672 scopus 로고
    • Skip techniques for high-speed carry propagation in binary arithmetic units
    • December
    • M. Lehman and N. Burla, "Skip techniques for high-speed carry propagation in binary arithmetic units," IRE Trans. on Electronic Computers, vol. EC-10, pp. 691-698, December 1962.
    • (1962) IRE Trans. on Electronic Computers , vol.EC-10 , pp. 691-698
    • Lehman, M.1    Burla, N.2
  • 10
    • 84937349985 scopus 로고
    • High speed arithmetic in binary computers
    • O. MacSorley, "High speed arithmetic in binary computers," IRE proceedings vol.49, pp. 67-91, 1961.
    • (1961) IRE Proceedings , vol.49 , pp. 67-91
    • MacSorley, O.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.