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Volumn , Issue , 2010, Pages 323-327
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Enhanced low-power high-speed adder for error-tolerant application
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Author keywords
Adders; Error rate; Error tolerance (ET); High speed integrated circuits; Low power design
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Indexed keywords
DESIGN CONSIDERATIONS;
ERROR RATE;
ERROR TOLERANT;
HIGH SPEED INTEGRATED CIRCUITS;
HIGH-SPEED;
HIGH-SPEED ADDERS;
LARGE DATA;
LOW POWER;
LOW-POWER DESIGN;
POWER CONSUMPTION;
SPEED PERFORMANCE;
SUB-100 NM;
DESIGN;
ELECTRIC POWER SUPPLIES TO APPARATUS;
INTEGRATED CIRCUITS;
SPEED;
ADDERS;
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EID: 79851489663
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/SOCDC.2010.5682905 Document Type: Conference Paper |
Times cited : (114)
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References (10)
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