An integrated patch-clamp amplifier for ultra-low current measurement on solid-state nanopore

2010 International SoC Design Conference, ISOCC 2010

Volumn , Issue , 2010, Pages 424-427

  Kim, Jungsuk ^a   Wang, Gang ^a   Dunbar, William B ^a   Pedrotti, Kenneth ^a  

^a University of California Santa Cruz   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN ANALYSIS; GAIN AMPLIFIERS; LOW CURRENT MEASUREMENTS; LOW NOISE; MAXIMUM GAIN; OPTIMAL FEEDBACK; PATCH-CLAMP AMPLIFIER; SOLID-STATE NANOPORE; THREE STAGES; TRANSIMPEDANCE AMPLIFIERS; UNITY-GAIN BUFFER;

DESIGN; NANOPORES;

DIFFERENTIAL AMPLIFIERS;

EID: 79851487297     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2010.5682879     Document Type: Conference Paper

References (12)

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