A random number generator for low power cryptographic application

2010 International SoC Design Conference, ISOCC 2010

Volumn , Issue , 2010, Pages 328-331

  Lan, Jingjing ^a   Goh, Wang Ling ^a   Kong, Zhi Hui ^a   Yeo, Kiat Seng ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Cryptography; Low power; Park Miller algorithm; Random number generator; Security

Indexed keywords

CMOS TECHNOLOGY; COMMUNICATION DEVICE; CRYPTOGRAPHIC APPLICATIONS; CRYPTOGRAPHIC KEY; CRYPTOGRAPHIC SYSTEMS; EXTERNAL COMPONENTS; LOW ENERGY CONSUMPTION; LOW POWER; NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY; POWER CONSUMPTION; PROPOSED ARCHITECTURES; PSEUDO RANDOM NUMBER GENERATORS; RANDOM NUMBER GENERATORS; RANDOM SEQUENCE; SECURITY; STATISTICAL PROPERTIES; STATISTICAL QUALITY;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; CRYPTOGRAPHY; DESIGN; DIGITAL INTEGRATED CIRCUITS; ENERGY UTILIZATION; NUMBER THEORY; PARKS; SHIFT REGISTERS; STATISTICAL TESTS;

RANDOM NUMBER GENERATION;

EID: 79851471661     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2010.5682906     Document Type: Conference Paper

References (11)

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